RPM-Based Fan Controller with Multiple Temperature Zones & Hardware Thermal Shutdown
Datasheet
7.26
Gain Register
Table 7.39 Gain Register
ADDR
R/W
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT
45h
R/W
Gain Register
-
-
GAIND[1:0]
GAINI[1:0]
GAINP[1:0]
2Ah
The Gain Register stores the gain terms used by the proportional and integral portions of the RPM-
based Fan Speed Control Algorithm. These terms will affect the FSC closed loop acquisition,
overshoot, and settling as would be expected in a classic PID system.
Table 7.40 Gain Decode
GAIND OR GAINP OR GAINI [1:0]
1
0
RESPECTIVE GAIN FACTOR
0
0
1
1
0
1
0
1
1x
2x
4x (default)
8x
7.27
Fan Spin Up Configuration Register
Table 7.41 Fan Spin Up Configuration Register
ADDR
R/W
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT
Fan Spin Up
Configuration
DRIVE_FAIL_
CNT [1:0]
NOK
ICK
SPINUP_TIME
[1:0]
46h
R/W
SPIN_LVL[2:0]
19h
The Fan Spin Up Configuration Register controls the settings of Spin Up Routine.
Bit 7 - 6 - DRIVE_FAIL_CNT[1:0] - Determines how many update cycles are used for the Drive Fail
detection function as shown in Table 7.42, "DRIVE_FAIL_CNT[1:0] Bit Decode". This circuitry
determines whether the fan can be driven to the desired tach target.
Table 7.42 DRIVE_FAIL_CNT[1:0] Bit Decode
DRIVE_FAIL_CNT[1:0]
1
0
NUMBER OF UPDATE PERIODS
Disabled - the Drive Fail detection circuitry is
disabled (default)
0
0
16 - the Drive Fail detection circuitry will count for 16
update periods
0
1
Revision 1.2 (10-08-09)
SMSC EMC2113
DATA6S2HEET
SMSC [ SMSC CORPORATION ]
