RPM-Based Fan Controller with Multiple Temperature Zones & Hardware Thermal Shutdown
Datasheet
These registers store the ideality factors that are applied to the external diodes.
Beta Compensation and Resistance Error Correction automatically correct for most diode ideality
errors, therefore it is not recommended that these settings be updated without consulting SMSC.
For CPU substrate transistors that require the BJT transistor model, the ideality factor behaves slightly
differently than for discrete diode-connected transistors. Refer to Table 7.11, "Substrate Diode Ideality
Factor Look-Up Table (BJT Model)" when using a CPU substrate transistor.
Only the lower three bits can be written. Writing to any other bit will be ignored.
The Ideality Factor Registers are software locked.
Table 7.10 Ideality Factor Look-Up Table
SETTING
FACTOR
10h
11h
12h
13h
14h
15h
16h
17h
1.0053
1.0066
1.0080
1.0093
1.0106
1.0119
1.0133
1.0146
Table 7.11 Substrate Diode Ideality Factor Look-Up Table (BJT Model)
SETTING
FACTOR
10h
11h
12h
13h
14h
15h
16h
17h
0.9973
0.9986
1.0000
1.0013
1.0026
1.0039
1.0053
1.0066
APPLICATION NOTE: When measuring a 65nm Intel CPUs, the Ideality Setting should be the default 12h. When
measuring 45nm Intel CPUs, the Ideality Setting should be 15h.
SMSC EMC2113
Revision 1.2 (10-08-09)
DATA4S7HEET
SMSC [ SMSC CORPORATION ]
