RPM-Based Fan Controller with HW Thermal Shutdown
Datasheet
6.40
Software Lock Register
Table 6.56 Software Lock
ADDR
R/W
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT
Software
Lock
EFh
R/W
-
-
-
-
-
-
-
LOCK
00h
The Software Lock Register controls the software locking of critical registers. This register is software
locked.
Bit 0 - LOCK - this bit acts on all registers that are designated SWL. When this bit is set, the locked
registers become read only and cannot be updated.
‘0’ (default) - all SWL registers can be updated normally.
‘1’ - all SWL registers cannot be updated and a hard-reset is required to unlock them.
6.41
Product Features Register
Table 6.57 Product Features Register
ADDR
R/W
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT
Product
Features
FCh
R
-
-
-
-
-
SHDN_SEL[2:0]
00h
The Product Features Register indicates which pin selected functionality is enabled.
Table 6.58 SHDN_SEL[2:0] Encoding
SHDN_SEL[2:0]
2
1
0
DIODE MODE
OTHER FEATURES
none
0
0
0
External Diode 1 Simple Mode - Beta
compensation disabled, REC disabled -
recommended for AMD CPU diodes
0
0
0
1
1
0
External Diode 1 Diode Mode - Beta
compensation disabled, REC enabled
none
none
External Diode 1 Transistor Mode - Beta
compensation enabled, REC enabled - -
recommended for Intel 45nm and 65mn CPU
diodes
0
1
1
0
1
0
Internal Diode Transistor Mode - Beta
compensation enabled, REC enabled
none
none
External Diode 2 Transistor Mode - Beta
compensation enabled, REC enabled
(EMC2103-2 only)
External Diode 1 Diode mode (EMC2103-1 only)
1
0
1
External Diode 1 Transistor Mode - Beta
compensation enabled, REC enabled
none
Revision 0.85 (01-29-08)
SMSC EMC2103
DATA6S8HEET
SMSC [ SMSC CORPORATION ]
