SMBus Fan Control with 1°C Accurate Temperature Monitoring
Datasheet
5.4.2
ALERT / TACH as an Interrupt
When the ALERT / TACH pin is used as an interrupt signal the pin is asserted whenever an out-of-
limit condition is detected. The ALERT / TACH pin will remain asserted until it is cleared even if the
error condition is removed.
5.4.3
Mask Bit
The MASK bit behaves differently depending on which mode the ALERT / TACH pin is configured to
operate in.
If the EMC2101 is configured with the ALERT / TACH pin operating in Interrupt Mode, the MASK bit
will be set in the following cases:
1. Automatically after the Status Register has been read if any bits in the Status Register have been
set (except BUSY and FAULT) (See Table 6.3).
2. Automatically when the EMC2101 responds to an Alert Response Address (ARA) command on an
SMBus and the ALERT / TACH pin is asserted. The ARA command does not clear the Status
Register. If the MASK bit is cleared prior to reading and clearing the Status Register, then the
ALERT / TACH pin will be asserted.
3. Directly via the SMBus.
In Interrupt Mode, the MASK bit will block the ALERT / TACH pin from being asserted in response to
an error condition.
If the EMC2101 is configured with the ALERT / TACH pin operating in Comparator Mode, the MASK
bit can only be set via the SMBus. In this mode, setting the MASK bit willl not affect the ALERT / TACH
pin.
In either mode, setting the individual channel mask bits will block the appropriate channel from
asserting the ALERT / TACH pin.
5.5
Temperature Monitors
In general, thermal diode temperature measurements are based on the change in forward bias voltage
of a diode when operated at two different currents. The change in forward bias voltage is proportional
to absolute temperature (T).
Where:
k = Boltzmann’s constant
⎛
⎞
IHIGH
ηkT
q
T = Absolute Temperature in Kelvin
q = electron charge
Eq: [1]
⎜
⎜
⎟
⎟
ΔVBE =VBE _ HIGH −VBE _ LOW
=
ln
ILOW
⎝
⎠
η = Diode Ideality Factor
SMSC EMC2101
Revision 2.53 (03-13-07)
DATA2S1HEET
SMSC [ SMSC CORPORATION ]
