SMBus Fan Control with 1°C Accurate Temperature Monitoring
Datasheet
Table 4.7 Block Read Byte Protocol
START
SLAVE
ADDRESS
WR
ACK
Register
Address
ACK
START
SLAVE
ADDRESS
RD
ACK
Register
Data
. . .
1
7
1
1
8
1
1
7
1
1
8
. . .
ACK
Register
ACK
Register
ACK
Register
. . .
ACK
Register
NACK
STOP
Data (00h)
Data (01h)
Data (02h)
Data (FFh)
1
8
1
8
1
8
. . .
1
8
1
1
Note: The shaded columns represent data sent from the EMC2101 to the EEPROM device.
APPLICATION NOTE: It is recommended that the EEPROM that is used be an AT24C02B or equivalent device.
The EEPROM slave address must be 101_0000b. The device must support a block-read
command, 8-bit addressing, and 8-bit data formatting using a 2-wire bus. The device must
support 3.3V digital switching logic and may not pull the SMCLK and SMDATA pins above
5V. Data must be transmitted MSB first.
APPLICATION NOTE: No other SMBus Master should exist on the SMDATA and SMCLK lines. The presence of
another SMBus Master will cause errors in reading from the EEPROM.
The EEPROM should be loaded to mirror the register set of the EMC2101 with the desired
configuration set. All undefined registers in the EMC2101 register set should be loaded with 00h in the
EEPROM. Likewise, all registers that are read-only in the EMC2101 register set should be loaded with
00h in the EEPROM.
Because of the interaction between the Fan Control Look-up Table and the Fan Configuration Register,
the EEPROM Loader stores the contents of the Fan Configuration Register and updates this register
at the end of the EEPROM loading cycle. (See Section 6.16 and Section 6.22).
SMSC EMC2101
Revision 2.53 (03-13-07)
DATA1S7HEET