1°C Temperature Sensor with Beta Compensation
Datasheet
Chapter 4 System Management Bus Interface Protocol
4.1
System Management Bus Interface Protocol
The EMC1403 and EMC1404 communicate with a host controller, such as an SMSC SIO, through the
SMBus. The SMBus is a two-wire serial communication protocol between a computer host and its
peripheral devices. A detailed timing diagram is shown in Figure 4.1.
.
TLOW
THIGH
THD:STA
TSU:STO
TRISE
TFALL
SMCLK
TSU:STA
THD:STA
THD:DAT
TSU:DAT
SMDTA
TBUF
S
S
P
P
S - Start Condition
P - Stop Condition
Figure 4.1 SMBus Timing Diagram
The EMC1403 and EMC1404 are SMBus 2.0 compatible and support Send Byte, Read Byte, Write
Byte, Receive Byte, and the Alert Response Address as valid protocols as shown below.
All of the below protocols use the convention in Table 4.1.
Table 4.1 Protocol Format
DATA SENT
TO DEVICE
DATA SENT TO
THE HOST
# of bits sent
# of bits sent
Attempting to communicate with the EMC1403 and EMC1404 SMBus interface with an invalid slave
address or invalid protocol will result in no response from the device and will not affect its register
contents. Stretching of the SMCLK signal is supported, provided other devices on the SMBus control
the timing.
4.2
Write Byte
The Write Byte is used to write one byte of data to the registers as shown below Table 4.2:
Table 4.2 Write Byte Protocol
SLAVE
ADDRESS
REGISTER
ADDRESS
REGISTER
DATA
START
WR
ACK
ACK
ACK
STOP
1
7
1
1
8
1
8
1
1
Revision 1.16 (03-15-07)
SMSC EMC1403/EMC1404
DATA1S2HEET