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EMC1047-1-AIZL-TR 参数 Datasheet PDF下载

EMC1047-1-AIZL-TR图片预览
型号: EMC1047-1-AIZL-TR
PDF下载: 下载PDF文件 查看货源
内容描述: [Serial Switch/Digital Sensor, 11 Bit(s), 2Cel, Square, Surface Mount, 3 X 3 MM, ROHS COMPLIANT, PLASTIC, TSSOP-10]
分类和应用: 输出元件传感器换能器
文件页数/大小: 37 页 / 264 K
品牌: SMSC [ SMSC CORPORATION ]
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1°C Multiple Temperature Sensor with Beta Compensation and Hottest of Thermal Zones  
Datasheet  
The One Shot Register is used to initiate a one shot command. Writing to the one shot register, when  
the device is in standby mode and BUSY bit (in Status Register) is ‘0’, will immediately cause the ADC  
to update all temperature measurements. Writing to the One Shot Register while the device is in active  
mode will have no affect.  
5.8  
External Diode Fault Register  
Table 5.11 External Diode Fault Register  
ADDR  
R/W  
REGISTER  
B7  
B6  
B5  
B4  
B3  
B2  
B1  
B0  
DEFAULT  
1Bh  
R-C  
External  
Diode Fault  
-
E6FLT E5FLT E4FLT E3FLT E2FLT  
E1FLT  
-
00h  
The External Diode Fault Register indicates which of the external diodes caused the FAULT bit in the  
Status Register to be set. These bits are cleared when read if the error condition has been removed.  
Bit 6 - E6FLT - This bit is set if the External Diode 6 channel reported a diode fault.  
Bit 5 - E5FLT - This bit is set if the External Diode 5 channel reported a diode fault.  
Bit 4 - E4FLT - This bit is set if the External Diode 4 channel reported a diode fault.  
Bit 3 - E3FLT - This bit is set if the External Diode 3 channel reported a diode fault.  
Bit 2 - E2FLT - This bit is set if the External Diode 2 channel reported a diode fault.  
Bit 1 - E1FLT - This bit is set if the External Diode 1 channel reported a diode fault.  
5.9  
Consecutive ALERT Register  
Table 5.12 Consecutive ALERT Register  
ADDR.  
R/W  
REGISTER  
B7  
B6  
B5  
B4  
B3  
B2  
B1  
B0  
DEFAULT  
22h  
R/W  
Consecutive  
ALERT  
TIME  
OUT  
-
-
-
CAL  
RT2  
CAL  
RT1  
CAL  
RT0  
-
70h  
The Consecutive ALERT Register determines how many times an out-of-limit error or diode fault must  
be detected in consecutive measurements before the interrupt status registers are asserted.  
Each out of limit error and diode fault condition has its own counter associated with it. Each counter  
is incremented whenever the corresponding channel exceeds the appropriate limit. Additionally, each  
counter is reset if the condition has been removed. (i.e. if External Diode 1 exceeds its high limit, it  
will increment the high counter. If, on the next measurement, it experiences a diode fault, the high limit  
counter will be reset and the diode fault counter will be incremented).  
When the consecutive alert counter reaches its programmed value then the STATUS bit(s) for that  
channel and the error condition will be set to ‘1’. Measurements will continue normally.  
For example, if the CALRT[2:0] bits are set for 4 consecutive alerts on an EMC1046/EMC1047 device,  
the high limits are set at 70°C, and none of the channels are masked, then the status bits will be  
asserted after the following four measurements:  
1. Internal Diode reads 71°C and both external diodes read 69°C. Consecutive alert counter for INT  
is incremented to 1.  
Revision 0.69 (06-29-09)  
SMSC EMC1046/EMC1047  
DATA2S8HEET  
 
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