1°C Multiple Temperature Sensor with HW Thermal Shutdown & Hottest of Thermal Zones
Datasheet
The High Limit Status Register contains the status bits that are set when a temperature channel high
limit is exceeded for a number of consecutive readings as set by the consecutive alert counts (see
Section 5.9). If any of these bits are set, then the HIGH status bit in the Status Register is set. Reading
from the High Limit Status Register will clear all bits if the error condition has been removed. Reading
from the register will also clear the HIGH status bit in the Status Register.
Bit 6 - E6HIGH - This bit is set when the External Diode 6 channel meets or exceeds its programmed
high limit.
Bit 5 - E5HIGH - This bit is set when the External Diode 5 channel meets or exceeds its programmed
high limit.
Bit 4 - E4HIGH - This bit is set when the External Diode 4 channel meets or exceeds its programmed
high limit.
Bit 3 - E3HIGH - This bit is set when the External Diode 3 channel meets or exceeds its programmed
high limit.
Bit 2 - E2HIGH - This bit is set when the External Diode 2 channel meets or exceeds its programmed
high limit.
Bit 1 - E1HIGH - This bit is set when the External Diode 1 channel meets or exceeds its programmed
high limit.
Bit 0 - IHIGH - This bit is set when the Internal Diode channel meets or exceeds its programmed high
limit.
5.14 Low Limit Status Register
Table 5.19 Low Limit Status Register
ADDR.
R/W
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT
36h
R-C
Low Limit
Status
-
E6
LOW
E5
LOW
E4
LOW
E3
LOW
E2
LOW
E1
LOW
ILOW
00h
The Low Limit Status Register contains the status bits that are set when a temperature channel drops
below the low limit for a number of consecutive readings as set by the consecutive alert counts (see
Section 5.9). If any of these bits are set, then the LOW status bit in the Status Register is set. Reading
from the Low Limit Status Register will clear all bits if the error condition has been removed. Reading
from the register will also clear the LOW status bit in the Status Register.
Bit 6 - E6LOW - This bit is set when the External Diode 6 channel drops below its programmed low
limit.
Bit 5- E5LOW - This bit is set when the External Diode 5 channel drops below its programmed low limit.
Bit 4 - E4LOW - This bit is set when the External Diode 4 channel drops below its programmed low
limit.
Bit 3 - E3LOW - This bit is set when the External Diode 3 channel drops below its programmed low
limit.
Bit 2 - E2LOW - This bit is set when the External Diode 2 channel drops below its programmed low
limit.
Bit 1 - E1LOW - This bit is set when the External Diode 1 channel drops below its programmed low
limit.
Bit 0 - ILOW - This bit is set when the Internal Diode channel drops below its programmed low limit.
Revision 0.62 (03-05-08)
SMSC EMC1046/EMC1047
DATA3S2HEET
SMSC [ SMSC CORPORATION ]
