1°C Triple Temperature Sensor with Resistance Error Correction
Datasheet
4.4
Register Allocation
See Table 4.1, “Register Table,” on page 11 for a description of registers that are accessible through
the SMBus:
Table 4.1 Register Table
READ
WRITE
ADDRESS
(HEX)
DEFAULT
VALUE
(HEX)
ADDRESS
(HEX)
REGISTER NAME
00
23
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
09
Legacy Format Internal Temperature High Byte
Legacy Format Internal Temperature Low Byte
Legacy Format Remote Temperature 1 High Byte
Legacy Format Remote Temperature 1 Low Byte
Legacy Format Remote Temperature 2 High Byte
Legacy Format Remote Temperature 2 Low Byte
Extended Format Remote Temperature 1 High Byte
Extended Format Remote Temperature 1 Low Byte
Extended Format Remote Temperature 2 High Byte
Extended Format Remote Temperature 2 Low Byte
Status register
00
00
00
00
00
00
00
00
00
00
00
47
--
01
10
F8
F9
FA
FB
FC
FD
02
03
Configuration register
N/A
27
0F
One Shot Command
27
Remote 1 Ideality Factor
12
12
28
28
Remote 2 Ideality Factor
ED
N/A
Product ID
04 (-1)
05 (-2)
06 (-3)
07 (-4)
FE
FF
N/A
N/A
Manufacturer ID
Revision Number
5D
01
During Power on Reset (POR), the default values are stored in the registers. A POR is initiated when
power is first applied to the part and the voltage on the VDD supply surpasses the POR level as
specified in the electrical characteristics. Any reads to undefined registers will return 00h. Writes to any
undefined registers will not have an effect.
The EMC1023 uses an interlock mechanism that prevents changes in register content when fresh
readings come in from the ADC during successive reads from a host. When the High Byte is read, the
last conversion value is latched into the High Byte and Low Byte. Please note that the interlock
mechanism is only effective when reading the High Byte first.
SMSC EMC1023
11
Revision 1.2 (04-15-05)
DATASHEET
SMSC [ SMSC CORPORATION ]
