ADDRESS DECODE
REGISTER
FFFFh
(FIXED LOCATION)
VALUE x 100h
ARCNET CORE
256 BYTES
PAGE
LOCATION CAN
VARY
64K
BYTES
0000h
FIGURE 2 – COM20051I EXTERNAL DATA ADDRESS SPACE
ADDRESS DECODE REGISTER
NAME
ADR DEC
BIT 7
A15
BIT 6
A14
BIT 5
A13
BIT 4
A12
BIT 3
A11
BIT 2
A10
BIT 1
A9
BIT 0
A8
LOCATION: FFFFh of the External Data Memory space. Default: 00h
EXAMPLE:
Address Decode Register = 80h
ARCNET core registers
will be located at 8000h + Register offset (e.g. ARCNET
Configuration Register offset = 06h, physical address = 8006h).
SMSC DS – COM20051I
Page 10
Rev. 03/27/2000