10 Mbps ARCNET (ANSI 878.1) Controller with 2Kx8 On-Chip RAM
Datasheet
6.4.1
6.4.2
6.4.3
Transmit Command Chaining .................................................................................................................45
Receive Command Chaining ..................................................................................................................45
Reset Details ..........................................................................................................................................46
Bus Determination ..................................................................................................................................46
Normal Results: ......................................................................................................................................48
Abnormal Results: ..................................................................................................................................48
Oscillator.................................................................................................................................................48
6.5
6.6
Initialization Sequence ...................................................................................................................... 46
6.5.1
6.6.1
6.6.2
6.6.3
Improved Diagnostics........................................................................................................................ 47
Chapter 7
7.1
7.2
Operational Description .................................................................................................... 50
Maximum Guaranteed Ratings* ........................................................................................................ 50
DC Electrical Characteristics............................................................................................................. 50
Chapter 8
Chapter 9
9.1
9.2
Timing Diagrams................................................................................................................ 53
Appendix A ......................................................................................................................... 69
NOSYNC Bit ...................................................................................................................................... 69
EF Bit................................................................................................................................................. 69
Chapter 10
Chapter 11
11.1
Appendix B ...................................................................................................................... 72
Appendix C...................................................................................................................... 73
Software Identification of the COM20022I 3V Rev B and Rev C................................................... 73
Revision 03-08-07
Page 4
SMSC COM20022I 3.3V Rev.C
DATASHEET
SMSC [ SMSC CORPORATION ]
