10 Mbps ARCNET (ANSI 878.1) Controller with 2Kx8 On-Board RAM
Datasheet
nTXEN
t4
t5
t2
t1
nPULSE1
LAST BIT
(400 nS BIT TIME)
t3
t2
t1
nPULSE2
RXIN
t6
t8
t7
Parameter
min
typ
max units
100
400
0
nS
nS
nS
nS
nS
t1
t2
t3
t4
t5
nPULSE1, nPULSE2 Pulse Width
nPULSE1, nPULSE2 Period
nPULSE1, nPULSE2 Overlap
nTXEN Low to nPULSE1 Low
+10
950
350
-10
850
250
Beginning of Last Bit Time to nTXEN High
t6
t7
t8
nS
nS
nS
RXIN Active Pulse Width
RXIN Period
RXIN Inactive Pulse Width
10
100
400
20
Note: Use Only 2.5 Mbps
Figure 8.13 - Normal Mode Transmit or Receive Timing
(These signals are to and from the hybrid)
Revision 02-27-06
Page 72
SMSC COM20022I 3V
DATASHEET