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CAP1088-1-CP-TR 参数 Datasheet PDF下载

CAP1088-1-CP-TR图片预览
型号: CAP1088-1-CP-TR
PDF下载: 下载PDF文件 查看货源
内容描述: 8通道电容式触摸传感器,具有8个LED驱动器 [8 Channel Capacitive Touch Sensor with 8 LED Drivers]
分类和应用: 驱动器模拟IC传感器信号电路
文件页数/大小: 72 页 / 994 K
品牌: SMSC [ SMSC CORPORATION ]
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8 Channel Capacitive Touch Sensor with 8 LED Drivers  
Datasheet  
3.2.5  
SMBus Stop Bit  
The SMBus Stop bit is defined as a transition of the SMBus Data line from a logic ‘0’ state to a logic  
‘1’ state while the SMBus clock line is in a logic ‘1’ state. When the CAP1088 detects an SMBus Stop  
bit, and it has been communicating with the SMBus protocol, it will reset its client interface and prepare  
to receive further communications.  
3.2.6  
SMBus Timeout  
The CAP1088 includes an SMBus timeout feature. Following a 30ms period of inactivity on the SMBus  
where the SMCLK pin is held low, the device will timeout and reset the SMBus interface.  
The timeout function defaults to disabled. It can be enabled by setting the TIMEOUT bit in the  
Configuration register (see Section 5.6).  
2
3.2.7  
SMBus and I C Compliance  
The major difference between SMBus and I2C devices is highlighted here. For complete compliance  
information refer to the SMBus 2.0 specification.  
1. Minimum frequency for SMBus communications is 10kHz.  
2. The client protocol will reset if the clock is held low longer than 30ms.  
3. The client protocol will reset if both the clock and the data line are high for longer than 150us (idle  
condition).  
4. I2C devices do not support the Alert Response Address functionality (which is optional for SMBus).  
5. I2C devices support block read and write differently. I2C protocol allows for unlimited number of  
bytes to be sent in either direction. The SMBus protocol requires that an additional data byte  
indicating number of bytes to read / write is transmitted. The CAP1088 supports I2C formatting only.  
3.3  
SMBus Protocols  
The CAP1088 is SMBus 2.0 compatible and supports Send Byte, Read Byte, Block Read, Receive  
Byte as valid protocols as shown below. The CAP1088 also supports the I2C block read and block  
write protocols. Finally, it will respond to the Alert Response Address protocol but is not in full  
compliance.  
All of the below protocols use the convention in Table 3.2.  
Table 3.2 Protocol Format  
DATA SENT  
TO DEVICE  
DATA SENT TO  
THE HOST  
Data sent  
Data sent  
3.3.1  
SMBus Write Byte  
The Write Byte is used to write one byte of data to a specific register as shown in Table 3.3.  
Table 3.3 Write Byte Protocol  
SLAVE  
ADDRESS  
REGISTER  
ADDRESS  
REGISTER  
DATA  
START  
1 ->0  
WR  
ACK  
ACK  
ACK  
STOP  
YYYY_YYY  
0
0
XXh  
0
XXh  
0
0 -> 1  
SMSC CAP1088  
Revision 1.1 (08-05-09)  
DATA1S7HEET