ST7669V
Ref
Hex Command
(10h) SLPIN
A0 /RD /WR D7 D6 D5 D4 D3 D2 D1
D0
0
Function
9.1.11
9.1.12
9.1.13
9.1.14
9.1.15
9.1.16
9.1.17
9.1.18
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
0
1
Sleep in & booster off
Sleep out & booster on
Partial mode on
0
0
0
0
0
0
0
1
1
1
1
1
1
1
0
0
0
0
0
0
0
(11h) SLPOUT
(12h) PTLON
(13h) NORON
(20h) INVOFF
(21h) INVON
(22h) APOFF
1
0
1
Partial off (Normal)
0
Display inversion off (normal)
Display inversion on
All pixel off (Only for test purpose)
1
0
All pixel on (Only for test
purpose)
(23h) APON
0
0
0
1
1
0
0
0
0
0
1
1
0
1
1
0
1
0
9.1.19
(25h) WRCNTR
-
0
0
0
0
0
Write contrast
0
1
0
0
0
1
1
1
1
0
1
1
1
1
0
1
0
1
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
EV6 EV5 EV4 EV3 EV2 EV1 EV0 EV = 0 to 127
9.1.20
9.1.21
9.1.22
(28h) DISPOFF
(29h) DISPON
(2Ah) CASET
1
1
1
1
1
1
0
0
1
Display off
0
0
0
0
0
0
0
0
0
0
1
0
Display on
Column address set
XS15 XS14 XS13 XS12 XS11 XS10 XS9 XS8 X_ADR start: 0≦XS≦83h
XS7 XS6 XS5 XS4 XS3 XS2 XS1 XS0
XE15 XE14 XE13 XE12 XE11 XE10 XE9 XE8 X_ADR end: XS≦XE ≦83h
XE7 XE6 XE5 XE4 XE3 XE2 XE1 XE0
9.1.23
(2Bh) RASET
1
1
1
Row address set
0
0
0
0
1
YS15 YS14 YS13 YS12 YS11 YS10 YS9 YS8 Y_ADR start: 0≦YS≦A1h
YS7 YS6 YS5 YS4 YS3 YS2 YS1 YS0
YE15 YE14 YE13 YE12 YE11 YE10 YE9 YE8 Y_ADR end: YS≦YE≦A1h
YE7 YE6 YE5 YE4 YE3 YE2 YE1 YE0
9.1.24
9.1.25
(2Ch) RAMWR
(2Eh) RAMRD
1
D5
1
1
D3
1
0
D1
1
Memory write
D0 Write data
0
D7
0
0
D6
0
0
D4
0
1
D2
1
0
0
-
Memory Read
-
-
-
-
-
-
-
D7
0
D6
0
D5
1
D4
1
D3
0
D2
0
D1
0
D0
0
9.1.26
(30h) PTLAR
Partial start/end address set
-
PS15 PS14 PS13 PS12 PS11 PS10 PS9 PS8 Start address (0~161)
PS7 PS6 PS5 PS4 PS3 PS2 PS1 PS0
PE15 PE14 PE13 PE12 PE11 PE10 PE9 PE8 End address (0~161)
PE7 PE6 PE5 PE4 PE3 PE2 PE1 PE0
-
Ver 1.3
62/208
6/4/2008
SITRONIX [ SITRONIX TECHNOLOGY CO., LTD. ]
