ST7669V
7.8.1 VOLTAGE REGULATOR CIRCUITS
There is a built-in voltage regulator circuits in ST7669V for generating V0. After internal voltage is regulated by voltage
regulator circuit, V0 is generated. Detail explanation of V0 set is listed below:
ꢁ
SET V0 (Temperature = 24℃)
V0=3.6+{Vop[8:0] + VopOffset[6:0]+ (EV[6:0]-3Fh)}x0.04
Example1 (V0 setting>16.48V):
Vop[8:0]=1 01000010 (142h)
(V)
VopOffset[6:0]=0000010 (02h)
EV[6:0]=0111111 (3Fh)
V0=3.6 + {322 + 2 + (63-63) } x 0.04 =16.56 (V)
Example2 (V0 setting<16.48V):
Vop[8:0]= 1 01000010 (142h)
VopOffset [6:0]=1000010 (42h)
EV[6:0]=0111111 (3Fh)
V0=3.6 + {322 -62 + (63-63) } x 0.04 =14 (V)
V0 restriction:
Because Vg should larger than 1.8V, ST7669V V0 value should be higher than 1.8 x Bias / 2 (V) and lower than 18V.
V0 value outside the available range is undefined. Users has to ensure while selecting the temperature compensation that
under all conditions and including all tolerances that the V0 voltage remains in the range.
Inhibit V0 Range
V0 setting
Bias
Available V0 Range
Min
4.5
Max
18.0
18.0
18.0
18.0
18.0
18.0
18.0
18.0
18.0
18.0
1/14
1/13
1/12
1/11
1/10
1/9
1/5
1/6
5.4
1/7
6.3
1/8
7.2
1/9
8.1
1/8
1/7
1/10
1/11
1/12
1/13
1/14
9.0
1/6
9.9
1/5
10.8
11.7
12.6
0
2
4
6
8
10
12
14
16
18
20
V0(Voltage)
Ver 1.3
48/208
6/4/2008
SITRONIX [ SITRONIX TECHNOLOGY CO., LTD. ]
