ST7669V
7.3.3 I/O Buffer Circuit
It is the bi-directional buffer used when MPU reads or writes the DDRAM. Since MPU’s read or write of DDRAM is
performed independently from data output to the display data latch circuit, asynchronous access to the DDRAM when the
LCD is turned on does not cause troubles such as flicking of the display images.
7.3.4 Scroll Address Circuit
The circuit associates pages on DDRAM with COM output. ST7669V processes signals for the liquid crystal display on
1-page basis. Thus, when specifying a specific area in the area scroll display or partial display, you must designate it in
block.
7.3.5 Display data Latch Circuit
This circuit is used to temporarily hold display data to be output from the DDRAM to the SEG decoder circuit. Since display
normal/inverse and display on/off commands are used to control data in the latch circuit alone, they do not modify data in
the DDRAM.
7.3.6 Normal Display On or Partial Mode On Vertical Scroll Off
In this mode, contents of the frame memory within an area where column address is 00h to 83h and row address is 00h to
A1h is displayed.
To display a dot on leftmost top corner, store the dot data at (column address, row address) = (0,0).
Example1) Normal Display On
Ver 1.3
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6/4/2008
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