ST7558
Oscillator
The on-chip oscillator provides the clock signal for the display system. No external components are required and the OSC
input must be connected to VDD. An external clock signal, if used, is connected to this input.
Display Timing Generator Circuit
This circuit generates some signals to be used for displaying LCD. The display clock, CL (internal), generated by oscillation
clock, generates the clock for the line counter and the signal for the display data latch. The line address of on-chip RAM is
generated in synchronization with the display clock and the display data latch circuit latches the 102-bit display data in
synchronization with the display clock. The display data, which is read to the LCD driver, is completely independent of the
access to the display data RAM from the microprocessor. The display clock generates an LCD AC signal (M) which
enables the LCD driver to make a AC drive waveform, and also generates an internal common timing signal and start
signal to the common driver. Driving waveform and internal timing signal are shown in Figure 13.
64 65
1
2
3
4
5
6
7
8
9
10 11 12
57 58 59 60 61 62 63 64 65
1
2
3
4
5
CL(Internal)
FR(Internal)
M (Internal)
V
VLCD
V1
V2
COM 0
COM 1
SEGn
V34
VSS
V
VLCD
V1
V2
V34
VSS
V
VLCD
V1
V2
V34
VSS
Fig.13 2-frame AC Driving Waveform (Duty Ratio: 1/65)
Ver 2.3
24/56
2005/10/05
SITRONIX [ SITRONIX TECHNOLOGY CO., LTD. ]
