ST7066U
n Interfacing to the MPU
The ST7066U can send data in either two 4-bit operations or one 8-bit operation, thus allowing interfacing with 4-
or 8-bit MPU.
l
For 4-bit interface data, only four bus lines (DB4 to DB7) are used for transfer. Bus lines DB0 to DB3
are disabled. The data transfer between the ST7066U and the MPU is completed after the 4-bit data has
been transferred twice. As for the order of data transfer, the four high order bits (for 8-bit operation, DB4 to
DB7) are transferred before the four low order bits (for 8-bit operation, DB0 to DB3). The busy flag must be
checked (one instruction) after the 4-bit data has been transferred twice. Two more 4-bit operations then
transfer the busy flag and address counter data.
Ø
Example of busy flag check timing sequence
R S
R /W
D e la y
E
(> 8 0 u s )
In te r n a l
o p e r a tio n
F u n c tio n in g
N o t
B u s y
D B 7
IR 7
IR 3
A C 3
A C 3
IR 7
IR 3
In s tr u c tio n w r ite
B u s y fla g c h e c k
B u s y fla g c h e c k
In s tr u c tio n w r ite
Ø
Intel 8051 interface
16
COM1 to COM16
4
P1.0 to P1.3
DB4 to DB7
P3.0
P3.1
P3.2
RS
R/W
E
40
SEG1 to SEG40
Intel 8051 Serial
ST7066U
V2.2
27/42
2006/05/11
SITRONIX [ SITRONIX TECHNOLOGY CO., LTD. ]
