ST2601B
4
SIGNAL DESCRIPTIONS
TABLE 4-1 Signal Function Groups
Function Group
Pad No. Designation
Description
VCC: Power supply for system
Power
VCC , PVCC, AVCC
AVCC: Power supply for LCD function
PVCC: Power supply for PSGO and PSGOB
GND: System power ground
Ground
GND , PGND, AGND
AGND: Power ground for LCD function
PGND: Power ground for PSGO and PSGOB
RESET : Active low system reset signal input
TEST: Leave this pin open when normal operation
MMD/ : Memory modes selection pin
CS0
RESET ,
Normal mode: Enable internal ROM.
MMD/ is connected to GND.
System control
TEST,
CS0
Emulation mode: Disable internal ROM.
MMD/ is connected to the chip-select pin of external
MMD/
CS0
CS0
ROM. During reset period, the MMD/
is an internally
CS0
pulled-up input pin. After reset cycles, MMD/
changed to be an output pin. It will output signal
is
CS0
CS0
.
High frequency oscillator (OSC) mode selected by code-option
Crystal mode: One crystal or resonator should be connected
between OSCI and XIO
XIO,OSCI
Clock
Resistor oscillator mode: One resistor should be connected
OSCXO,OSCXI, ,
between OSCI and VCC
OSCXI, OSCXO: Connect one 32768Hz crystal between these
two pins when using low frequency oscillator
WR / SEG9,
External memory R/W control signals / LCD Segment drivers
External memory
bus signals
/ SEG8
RD
A[22:0]/SEG32~SEG10
D[7:0]/SEG7~SEG0
PSGO, PSGOB
External memory address bus / LCD Segment drivers
External memory data bus / LCD Segment drivers
PSG outputs. Connect to one buzzer or speaker
I/O port D and chip-select outputs / LCD Segment drivers
/ LCD drivers
PSG/PWM DAC
/PD4~0 /
SEG33~SEG37,
CS5 ~ 1
Chip selects / LCD
drivers
/A23/PD5 /SEG38
CS6
RXD0/PC7,TXD0/PC6,
RXD1/PD7/SEG40,TXD1/
PD6/SEG39
UART signals and I/Os / LCD Segment drivers
SPI signals and I/Os
UART
SPI
/PC5 ,
DATA_READY
/PC4 , SDO/PC3 ,
SS
SDI/PC2 , SCK/PC1
5/35
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