ST2601B
3
FEATURES
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Totally static 8-bit CPU
ROM: 128k x 8-bit
RAM: 1.5K x 8-bit
Stack: Up to 128-level deep
Operation voltage: 2.4V ~ 3.6V
Operation frequency:
– 3.0Mhz@2.4V(Min.)
– 4.0Mhz@2.7V(Min.)
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Dual clock sources with warm-up timer
– Low frequency crystal oscillator (OSCX)
····················································32768 Hz
– High frequency resistor or crystal/resonator oscillator
(OSC) selected by pin option ..................455K~4M Hz
Direct Memory Access (DMA)
– Block-to-Block transfer
– Block to Single port
LCD Power Management
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LCD Drives
– COM: 36 outputs. Eight shared with one output port
– SEG: 56 outputs. Shared with 3 I/O ports and memory
bus signals.
One 8x8 Signed Multiplier
Low Voltage Reset (LVR)
– Two levels by code option
Low Voltage Detector (LVD)
– Programmable 4 levels
– DC-DC converter with 8-level output control
– LC driving voltage regulator with 16-level control
– 1/4, 1/5, 1/6 bias options with 4 voltage followers
LCD Driver
– 32x28~56x36 resolution, maximum 2016 dots
– One clock source from osc / oscx
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– Internal bias resistors(1/4, 1/5, 1/6 bias).
LCD Controller (LCDC)
– System power or external battery level can be detected.
Programmable Watchdog Timer (WDT)
Memory interface to ROM, RAM, Flash
Memory configuration
– Three kinds of banks for program, data and interrupt
– 12-bit bank registers support up to 44M bytes
– Six programmable chip-selects with 4 modes
– Maximum single device of 16M bytes
General-Purpose I/O (GPIO) ports
– Up to 39 bit programmable I/Os
8 dedicated CMOS I/Os
– Software programmable display size up to 100X100
– B/W, Hardware 4/16 gray levels with 5-bit palette
– Support 1-/4-/8-bit LCD data bus
– Share system memory with display buffer and with no
loss of the CPU time
– LCD buffer extension function to combine both internal
and external RAM for larger display
– Diverse functions including virtual screen, panning,
scrolling, contrast control and alternating signal
generator
Programmable Sound Generator (PSG)
– Four channels with three playing modes:
9-bit ADPCM, 8-bit PCM and 8-bit melody
– One 16-byte buffer and 6-bit volume control per channel
– Wavetable melody support
– Two dedicated PWM outputs for direct driving
– One 12-bit current DAC
Universal Asynchronous Receiver/Transmitter (UART)
– Full-duplex operation
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23 shared with LCD SEGs
8 open drain output pins shared with LCD COMs
– Bit programmable pull-up for input pins
– Pull-up/down and open-drain/CMOS control for Port-C
Timer/Counter
– Four 12-bit timers.
– One 8-bit base timer
– Seven fixed base timers
Three clocking outputs
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– Baud rate generator with one digital PLL
– Standard baud rates of 600 bps to 115.2 kbps
– Both transmitter and receiver buffers supported
– Direct glueless support of IrDA physical layer protocol
– Two sets of I/Os (TX,RX) for two independent devices
Serial Peripheral Interface (SPI)
– Clock sources including Timer0/1, baud rate generator
Eleven prioritized interrupts with dedicated exception
vectors
– External interrupt (edge triggered)
– LCD buffer interrupt
– Base timer interrupt
– Master and slave modes
– Timer0~3 interrupts (x4)
– SPI interrupts (x2)
– UART interrupts (x2)
– Five serial signals including enable and data-ready
– Both transmitter and receiver buffers supported
– Programmable data length from 7-bit to 16-bit
Vlcd/LVD trimming fuse function:
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Vlcd default voltage variation trimming.
4-level LVD voltage variation trimming.
Three power down modes
– WAI0 mode
– WAI1 mode
– STP mode
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