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ST2202A 参数 Datasheet PDF下载

ST2202A图片预览
型号: ST2202A
PDF下载: 下载PDF文件 查看货源
内容描述: 8位集成微控制器256K字节ROM [8 BIT Integrated Microcontroller with 256K Bytes ROM]
分类和应用: 微控制器
文件页数/大小: 75 页 / 2179 K
品牌: SITRONIX [ SITRONIX TECHNOLOGY CO., LTD. ]
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ST2202A  
16. LCD CONTROLLER (LCDC)  
TheꢀLCDꢀcontrollerꢀ(LCDC)ꢀprovidesꢀdisplayꢀdataꢀandꢀ  
specificꢀsignalsꢀforꢀexternalꢀLCDꢀdriversꢀtoꢀdriveꢀtheꢀSTNꢀ  
LCDꢀpanels.ꢀTheꢀLCDCꢀfetchesꢀdisplayꢀdataꢀdirectlyꢀfromꢀ  
internalꢀsystemꢀmemoryꢀthroughꢀoneꢀuniqueꢀmemoryꢀbus.ꢀ  
Theꢀspecialꢀdesignedꢀinternalꢀbusꢀsharesꢀalmostꢀnoneꢀofꢀ  
theꢀCPUꢀresourcesꢀtoꢀmakeꢀbothꢀfastꢀdisplayꢀdataꢀprocessꢀ  
andꢀhighꢀspeedꢀCPUꢀoperationꢀpossible.ꢀTheꢀST2202ꢀ  
buildsꢀinꢀ4KꢀbytesꢀSRAM,ꢀsoꢀtheꢀmaximumꢀpanelꢀsizeꢀcanꢀ  
beꢀ240x120.ꢀTheꢀLCDCꢀalsoꢀsupportsꢀsoftwareꢀgrayscaleꢀtoꢀ  
richꢀtheꢀdisplayꢀinformationꢀandꢀtheꢀdiversityꢀofꢀcontentsꢀasꢀ  
well.ꢀ  
TheꢀST2202ꢀsupportsꢀ1ꢁꢀandꢀ4ꢁbitꢀdataꢀbusꢀforꢀtheꢀ  
compatibilityꢀofꢀmostꢀpopularꢀLCDꢀdrivers.ꢀTheꢀLCDꢀoutputꢀ  
signalsꢀareꢀsharedꢀwithꢀPortꢁL.,ꢀandꢀareꢀcontrolledꢀbyꢀLCDꢀ  
powerꢀcontrolꢀbitꢀLPWRꢀ(LCTL[7])ꢀandꢀdataꢀbusꢀselectionꢀ  
bitꢀLMODꢀ(LCK[4]).ꢀInꢀcaseꢀofꢀ1ꢁbitꢀmode,ꢀPL3~1ꢀofꢀPortꢁLꢀ  
canꢀstillꢀbeꢀusedꢀforꢀgeneralꢀpurpose.ꢀ ꢀ  
Note:ꢀTheꢀLCDꢀsignalsꢀwillꢀbeꢀdisconnectedꢀandꢀ  
PortꢁLꢀwillꢀoutputꢀvaluesꢀassignedꢀbyꢀPL  
afterꢀclearingꢀLPWR.ꢀ  
Variousꢀfunctionsꢀareꢀalsoꢀsupportedꢀtoꢀrichꢀtheꢀdisplayꢀ  
information,ꢀincludingꢀvirtualꢀscreen,ꢀpanning,ꢀscrolling,ꢀ  
contrastꢀcontrolꢀandꢀanꢀalternatingꢀsignalꢀgenerator.ꢀControlꢀ  
registersꢀusedꢀbyꢀLCDCꢀareꢀlistedꢀbelow.ꢀ  
LCDCKꢀisꢀforꢀLCDCꢀtoꢀgenerateꢀtimingsꢀandꢀtheꢀpixelꢀclock.ꢀ ꢀ  
ReferꢀtoꢀTABLEꢀ11ꢁ3ꢀforꢀfrequencyꢀsettingsꢀofꢀLCDCK.ꢀ  
TABLE 16-1 Summary Of LCD Control Registers  
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2  
SSA[7]ꢀ SSA[6]ꢀ SSA[5]ꢀ SSA[4]ꢀ SSA[3]ꢀ SSA[2]ꢀ SSA[1]ꢀ SSA[0]ꢀ 0000ꢀ0000ꢀ  
Address Name  
R/W  
Bit 1  
Bit 0  
Default  
$040 LSSAL  
$041 LSSAH  
$042 LVPW  
$043 LXMAX  
$044 LYMAX  
$045 LPAN  
$047 LCTR  
$048 LCK  
$049 LFRA  
$04A LAC  
$04B LPWM  
$04C PL  
Wꢀ  
Wꢀ SSA[15]ꢀ SSA[14]ꢀ SSA[13]ꢀ SSA[12]ꢀ SSA[11]ꢀ SSA[10]ꢀ SSA[9]ꢀ SSA[8]ꢀ 0000ꢀ0000ꢀ  
Wꢀ  
VP[7]ꢀ  
R/Wꢀ XM[7]ꢀ  
R/Wꢀ YM[7]ꢀ  
VP[6]ꢀ  
XM[6]ꢀ  
YM[6]ꢀ  
ꢁꢀ  
VP[5]ꢀ  
XM[5]ꢀ  
YM[5]ꢀ  
ꢁꢀ  
REVꢀ  
ꢁꢀ  
VP[4]ꢀ  
XM[4]ꢀ  
YM[4]ꢀ  
ꢁꢀ  
VP[3]ꢀ  
XM[3]ꢀ  
YM[3]ꢀ  
ꢁꢀ  
VP[2]ꢀ  
XM[2]ꢀ  
YM[2]ꢀ  
VP[1]ꢀ  
XM[1]ꢀ  
YM[1]ꢀ  
VP[0]ꢀ  
XM[0]ꢀ  
YM[0]ꢀ  
0000ꢀ0000ꢀ  
0000ꢀ0000ꢀ  
0000ꢀ0000ꢀ  
R/Wꢀ  
ꢁꢀ  
PAN[2]ꢀ PAN[1]ꢀ PAN[0]ꢀ ꢁꢀꢁꢀꢁꢀꢁꢀꢁ000ꢀ  
ꢁꢀ ꢁꢀ ꢁꢀ 100ꢁꢀꢁꢀꢁꢀꢁꢀꢁꢀ  
R/Wꢀ LPWRꢀ BLNKꢀ  
ꢁꢀ  
ꢁꢀ  
Wꢀ  
Wꢀ  
R/Wꢀ  
R/Wꢀ  
R/Wꢀ  
Wꢀ  
ꢁꢀ  
ꢁꢀ  
LMODꢀ LCK[3]ꢀ LCK[2]ꢀ LCK[1]ꢀ LCK[0]ꢀ ꢁꢀꢁꢀꢁ0ꢀ0000ꢀ  
ꢁꢀ  
ꢁꢀ  
ꢁꢀ  
ꢁꢀ  
ꢁꢀ  
ꢁꢀ  
FRA[5]ꢀ FRA[4]ꢀ FRA[3]ꢀ FRA[2]ꢀ FRA[1]ꢀ FRA[0]ꢀ ꢁꢀꢁꢀ00ꢀ0000ꢀ  
ꢁꢀ AC[4]ꢀ AC[3]ꢀ AC[2]ꢀ AC[1]ꢀ AC[0]ꢀ ꢁꢀꢁꢀꢁ0ꢀ0000ꢀ  
LPWM[5]ꢀLPWM[4]ꢀLPWM[3]ꢀLPWM[2]ꢀLPWM[1]ꢀLPWM[0]ꢀ ꢁꢀꢁꢀ00ꢀ0000ꢀ  
PL[5]ꢀ PL[4]ꢀ PL[3]ꢀ PL[2]ꢀ PL[1]ꢀ PL[0]ꢀ 1111ꢀ1111ꢀ  
PL[7]ꢀ  
PL[6]ꢀ  
$04E PCL  
PCL[7]ꢀ PCL[6]ꢀ PCL[5]ꢀ PCL[4]ꢀ PCL[3]ꢀ PCL[2]ꢀ PCL[1]ꢀ PCL[0]ꢀ 0000ꢀ0000ꢀ  
16.1 LCD Specific Signals  
TheꢀfollowingꢀsignalsꢀareꢀgeneratedꢀbyꢀLCDCꢀtoꢀconnectꢀ  
toggleꢀforꢀaꢀperiodꢀofꢀ1ꢀtoꢀ31ꢀlinesꢀorꢀoneꢀframe.ꢀSeeꢀ  
theꢀST2202ꢀandꢀanꢀLCDꢀpanel.ꢀTwoꢀofꢀthemꢀareꢀdedicatedꢀ  
outputꢀpins,ꢀwhileꢀtheꢀrestꢀeightꢀpinsꢀareꢀmultiplexedꢀwithꢀ  
sectionꢀ16.4.7ꢀforꢀregisterꢀsettings.ꢀ  
PortꢁL.ꢀ  
CP (PL4)  
TheꢀLCDꢀshiftꢀclockꢀpulseꢀsignalꢀisꢀtheꢀclockꢀoutputꢀtoꢀwhichꢀ  
theꢀoutputꢀdataꢀtoꢀtheꢀLCDꢀpanelꢀisꢀsynchronized.ꢀDataꢀforꢀ  
segmentꢀdriversꢀisꢀshiftedꢀintoꢀtheꢀinternalꢀlineꢀbufferꢀatꢀ  
eachꢀfallingꢀedgeꢀofꢀCP.ꢀ  
TheꢀLCDꢀdataꢀbusꢀlinesꢀtransferꢀpixelꢀdataꢀtoꢀtheꢀLCDꢀpanelꢀ  
soꢀthatꢀitꢀcanꢀbeꢀdisplayed.ꢀTwoꢀkindsꢀofꢀdataꢀbusses,ꢀ1ꢁꢀ  
andꢀ4ꢁbit,ꢀareꢀsupportedꢀandꢀareꢀcontrolledꢀbyꢀLMOD  
FLM (PL7)  
TheꢀLCDꢀframeꢀmarkerꢀsignalꢀindicatesꢀtheꢀstartꢀofꢀaꢀnewꢀ  
displayꢀframe.ꢀFLMꢀbecomesꢀactiveꢀafterꢀtheꢀlastꢀlineꢀpulseꢀ  
ofꢀtheꢀframeꢀandꢀremainsꢀactiveꢀuntilꢀtheꢀnextꢀlineꢀpulse,ꢀatꢀ  
whichꢀpointꢀitꢀdeꢁassertsꢀandꢀremainsꢀinactiveꢀuntilꢀtheꢀnextꢀ  
frame.ꢀ  
LD3~0 (PL3~0)  
LOAD (PL6)  
TheꢀLCDꢀlineꢀpulseꢀsignalꢀisꢀusedꢀtoꢀlatchꢀaꢀlineꢀofꢀshiftedꢀ  
dataꢀtoꢀtheꢀsegmentꢀdrivers’ꢀoutputsꢀandꢀisꢀalsoꢀusedꢀtoꢀ  
shiftꢀtheꢀlineꢀenableꢀsignalꢀofꢀcommonꢀdriver.ꢀAllꢀtheꢀdriverꢀ  
outputsꢀthenꢀcontrolꢀtheꢀliquidꢀcrystalꢀtoꢀformꢀtheꢀdesiredꢀ  
frameꢀonꢀpanel.ꢀ  
(
LCK[4]).ꢀInꢀcaseꢀofꢀ1ꢁbitꢀmode,ꢀLMODꢀshouldꢀbeꢀclearedꢀ  
andꢀtheꢀLCDCꢀusesꢀonlyꢀLD0ꢀtoꢀtransferꢀdata.ꢀLD3~1ꢀcanꢀ  
stillꢀbeꢀprogrammedꢀtoꢀbeꢀnormalꢀinputsꢀorꢀoutputs.ꢀTheꢀ  
outputꢀpixelꢀdataꢀcanꢀbeꢀinvertedꢀthroughꢀprogramming.ꢀ  
SettingꢀREVꢀ(LCTR)ꢀwillꢀreverseꢀtheꢀoutputꢀdataꢀonꢀdataꢀ  
bus.ꢀ  
AC (PL5)  
TheꢀLCDꢀalternateꢀsignalꢀtogglesꢀtheꢀpolarityꢀofꢀliquidꢀ  
crystalꢀonꢀtheꢀpanel.ꢀThisꢀsignalꢀcanꢀbeꢀprogrammedꢀtoꢀ  
(Power control)  
POFF  
TheꢀLCDꢀpowerꢀcontrolꢀsignalꢀisꢀusedꢀtoꢀturnꢀon/offꢀtheꢀ  
Verꢀ2.5ꢀ  
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9/16/2008ꢀ  
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