欢迎访问ic37.com |
会员登录 免费注册
发布采购

HS7541AJN 参数 Datasheet PDF下载

HS7541AJN图片预览
型号: HS7541AJN
PDF下载: 下载PDF文件 查看货源
内容描述: 12位CMOS乘法DAC [12-Bit CMOS Multiplying DAC]
分类和应用: 转换器数模转换器光电二极管
文件页数/大小: 7 页 / 113 K
品牌: SIPEX [ SIPEX CORPORATION ]
 浏览型号HS7541AJN的Datasheet PDF文件第1页浏览型号HS7541AJN的Datasheet PDF文件第2页浏览型号HS7541AJN的Datasheet PDF文件第3页浏览型号HS7541AJN的Datasheet PDF文件第4页浏览型号HS7541AJN的Datasheet PDF文件第5页浏览型号HS7541AJN的Datasheet PDF文件第7页  
GAIN TRIM  
+15V  
16  
V
(–10V)  
REF  
2K  
17  
4
D
(MSB)  
V
V
18  
1
11  
REF  
DD  
R
FB  
1KΩ  
I
O1  
+
V
INPUT  
DATA  
OUT  
HS7541A  
10KΩ  
390Ω  
15  
2
I
10KΩ  
D
(LSB)  
O2  
0
GND  
3
+
10KΩ  
500Ω  
Figure 5. Bipolar Operation  
As shown in the figure, the output current of the  
HS7541A is typically connected to an external  
op amp, with its non-inverting input tied to  
ground. The amplifier should be selected for  
low input bias current and low drift over tem-  
perature. Tomaintainthespecifiedlinearity, the  
amplifier’sinputoffsetvoltageshouldbemulled  
to less than ±200µV (0.1 LSB).  
minal, may be anywhere between 10k(the  
feedback resistor alone when all digital inputs  
are LOW) and 7.5k(the feedback resistor in  
parallel with approximately 30kof the R-2R  
ladder network resistance when any single bit is  
HIGH). Static accuracy and dynamic perfor-  
mance will be affected by these variations.  
UNIPOLAR OPERATION  
BIPOLAR OPERATION  
Figure 4 shows the connections to implement  
digital unipolar operation of the HS7541A. The  
reference voltage applied to VREF (pin17) may be  
positive or negative. The 2Kpotentiometer  
tied to VREF, and the 1Kresistor in the feed-  
back loop are both optional; they are needed  
only when gain error must be trimmed to less  
than 0.3% FSR. They should track each other to  
better than 0.1%. It is not necessary that they  
track the resistors internal to the HS7541A.  
Figure 5 shows the connections for bipolar  
operation of the HS7541A. The digital input  
coding is offset binary as shown in Table 2. As  
is the case for unipolar operation, the gain trim  
resistors can be omitted if minimum gain error  
is not required. The op amp selection criteria  
and offset nulling are the same as for unipolar  
operation.  
DIGITAL INPUT  
1111 1111 1111  
1000 0000 0001  
1000 0000 0000  
0100 0000 0000  
0000 0000 0000  
I0UT  
DIGITAL INPUT  
1111 1111 1111  
1000 0000 0000  
0111 1111 1111  
0000 0000 0000  
I0UT  
-0.99951 x VREF  
-0.00049 x VREF  
0V  
-0.99975 x VREF  
-0.50000 x VREF  
-0.49975 x VREF  
0V  
+0.50000 x VREF  
+1.00000 x VREF  
Table 1. Unipolar Input Coding  
Table 2. Bipolar Input Coding  
HS7541A  
12-Bit CMOS Multiplying DAC  
© Copyright 2000 Sipex Corporation  
6