STK14CC8
PACKAGES
VCAP
A16
A14
1
2
3
4
5
6
VCC
A15
HSB
48
47
46
45
44
43
A12
A7
A6
W
A13
A8
A5
7
8
9
10
11
12
13
14
15
16
A9
42
41
40
39
38
37
36
35
34
33
A4
A11
A18
A17
VSS
VSS
DQ0
A3
A2
A1
A0
DQ6
G
A10
E
DQ7
17
18
32
31
30
29
28
27
26
25
19
20
21
22
23
24
DQ1
DQ2
DQ5
DQ4
DQ3
VCC
48 Pin SSOP
Relative PCB area usage.
See website for detailed
package size specifications.
PIN DESCRIPTIONS
Pin Name
I/O
Description
A18 – A0
Input
Address: The 19 address inputs select one of 524,288 bytes in the nvSRAM array.
Data: Bi-directional 8-bit data bus for accessing the nvSRAM.
DQ7 –DQ0
E
I/O
Input
Chip Enable: The active low
Write Enable: The active low
E
input selects the device.
W
enables data on the DQ pins to be written to the address location latched by
W
Input
the falling edge of E
.
Output Enable: The active low
G
input enables the data output buffers during read cycles. De-asserting G
G
Input
high causes the DQ pins to tri-state.
VCC
Power Supply
Power 3.0V +20%, -10%
Hardware Store Busy: When low this output indicates a Hardware Store is in progress. When pulled low external
HSB
I/O
to the chip it will initiate a nonvolatile STORE operation. A weak internal pull up resistor keeps this pin high if not
connected. (Connection Optional)
Autostore Capacitor: Supplies power to nvSRAM during power loss to store data from SRAM to nonvolatile
VCAP
Power Supply
elements.
VSS
Power Supply
No Connect
Ground
(Blank)
Unlabeled pins have no internal connection.
September 2005
2
Document Control #ML0034 rev 0.0
SIMTEK [ SIMTEK CORPORATION ]
