STK14CA8
PACKAGES
VCAP
1
VCAP
A16
VCC
A15
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
VCC
A15
A16
A14
2
2
3
HSB
3
A14
A12
HSB
W
A12
A7
4
W
A13
A8
4
5
A7
A6
A5
A4
A13
A8
5
A6
A5
6
6
A9
7
7
A9
NC
A4
NC
A11
8
A11
8
9
A3
A2
9
G
NC
NC
NC
VSS
NC
10
11
12
13
14
15
16
17
18
19
20
21
A10
10
11
12
13
14
15
16
NC
NC
VSS
NC
NC
DQ6
A1
A0
E
DQ7
DQ0
DQ1
DQ2
VSS
DQ6
DQ5
NC
NC
DQ0
DQ4
DQ3
A3
A2
G
A10
32-Pin SOIC
A1
E
DQ7
DQ5
DQ4
DQ3
VCC
A0
DQ1
DQ2
22
23
NC
NC
24
48-Pin SSOP
Relative PCB area usage.
See page 17 for detailed package
size specifications.
PIN DESCRIPTIONS
Pin Name
I/O
Description
A
-A
Input
I/O
Address: The 17 address inputs select one of 131,072 bytes in the nvSRAM array
Data: Bi-directional 8-bit data bus for accessing the nvSRAM
Chip Enable: The active low E input selects the device
16
0
DQ -DQ
7
0
E
Input
Input
W
Write Enable: The active low W enables data on the DQ pins to be written to the address
location latched by the falling edge of E
G
Input
Output Enable: The active low G input enables the data output buffers during read cycles.
De-asserting G high caused the DQ pins to tri-state.
V
Power Supply
I/O
Power: 3.0V, +20%, -10%
CC
HSB
Hardware Store Busy: When low this output indicates a Store is in progress. When pulled
low external to the chip, it will initiate a nonvolatile STORE operation. A weak pull up resistor
keeps this pin high if not connected. (Connection Optional).
V
V
Power Supply
Autostore Capacitor: Supplies power to nvSRAM during power loss to store data from
SRAM to nonvolatile storage elements.
CAP
Power Supply
No Connect
Ground
SS
NC
Unlabeled pins have no internal connections.
Rev 2.1
Document Control #ML0022
Jan, 2008
2
SIMTEK [ SIMTEK CORPORATION ]
