SiI3114 PCI to Serial ATA Controller
Data Sheet
Silicon Image, Inc.
FIFO Port – Channel X.......................................................................................................................... 60
FIFO Pointers1– Channel X.................................................................................................................. 61
FIFO Pointers2– Channel X.................................................................................................................. 61
Channel X Task File Register 0............................................................................................................. 62
Channel X Task File Register 1............................................................................................................. 62
Channel X Task File Register 2............................................................................................................. 63
Channel X Read Ahead Data ................................................................................................................ 63
Channel X Task File Register 0 – Command Buffering......................................................................... 64
Channel X Task File Register 1 – Command Buffering......................................................................... 64
Channel X Extended Task File Register – Command Buffering ........................................................... 65
Channel X Virtual DMA/PIO Read Ahead Byte Count .......................................................................... 65
Channel X Task File Configuration + Status.......................................................................................... 65
Data Transfer Mode – Channel X.......................................................................................................... 66
Serial ATA SControl ............................................................................................................................... 67
Serial ATA SStatus................................................................................................................................. 68
Serial ATA SError................................................................................................................................... 69
Serial ATA SActive................................................................................................................................. 70
SMisc..................................................................................................................................................... 70
Serial ATA PHY Configuration ............................................................................................................... 71
SIEN ...................................................................................................................................................... 72
SFISCfg................................................................................................................................................. 73
RxFIS0-RxFIS6 ..................................................................................................................................... 73
Programming Sequences .......................................................................................................................... 74
Recommended Initialization Sequence for the SiI3114...................................................................... 74
Serial ATA Device Initialization.............................................................................................................. 75
Issue ATA Command............................................................................................................................... 76
PIO Mode Read/Write Operation............................................................................................................ 76
Watchdog Timer Operation.................................................................................................................... 77
PIO Mode Read Ahead Operation.......................................................................................................... 78
MDMA/UDMA Read/Write Operation ..................................................................................................... 78
Virtual DMA Read/Write Operation........................................................................................................ 79
Using Virtual DMA with Non-DMA Capable Devices............................................................................. 79
Using Virtual DMA with DMA Capable Devices..................................................................................... 81
Second PCI Bus Master Registers Usage............................................................................................ 82
Power Management.................................................................................................................................... 83
Power Management Summary............................................................................................................... 83
Partial Power Management Mode.......................................................................................................... 83
Slumber Power Management Mode ...................................................................................................... 83
Hot Plug Support .................................................................................................................................... 84
FIS Support ................................................................................................................................................. 85
FIS Summary ........................................................................................................................................... 85
FIS Transmission .................................................................................................................................... 86
FIS Reception.......................................................................................................................................... 86
FIS Types Not Affiliated with Current ATA/ATAPI Operations ............................................................ 89
BIST Support......................................................................................................................................... 89
BIST Signals.......................................................................................................................................... 89
DMA Setup ............................................................................................................................................ 89
© 2007 Silicon Image, Inc.
v
SiI-DS-0103-D
SILICONIMAGE [ Silicon image ]
