SiI3114 PCI to Serial ATA Controller
Data Sheet
Silicon Image, Inc.
Table 12. Flash Data Description (continued)
Address
Data Byte
Description
PCI Sub-System Vendor ID [15:08]
7FFF6H
7FFF5H
7FFF4H
7FFF3 H
7FFF2 H
7FFF1 H
7FFF0 H
D09
D10
D11
D12
D13
D14
D15
PCI Sub-System ID [23:16]
PCI Sub-System ID [31:24]
SATA PHY Config [07:00] (default: 0xB0)
SATA PHY Config [15:08] (default: 0x80)
SATA PHY Config [23:16] (default: 0x00)
SATA PHY Config [31:24] (default: 0x20)
Auto-Initialization from EEPROM
The SiI3114 initiates the EEPROM detection and configuration space loading sequence after the Flash read
sequence. The SiI3114 supports up to 256-byte EEPROM with a 2-wire serial interface. The sequence of
operations consists of the following.
1. START condition defined as a high-to-low transition on SDAT while SCLK is high.
2. Control byte = 1010 (Control Code) + 000 (Chip Select) + 0 (Write Address)
3. Acknowledge
4. Starting address field = 00000000.
5. Acknowledge
6. Sequential data bytes separated by Acknowledges.
7. STOP condition.
While the sequence is active, the SiI3114 responds to all PCI bus accesses with a Target Retry.
S
1
0
1
0
0
0
0
W
A
D
D
D
N
P
SDAT
t1
t2
SCLK
t3
FL_CS_N
Figure 9. Auto-Initialization from EEPROM Timing
Table 13. Auto-Initialization from EEPROM Timing
Parameter
Value
Description
t1
End of Auto-Initialization from Flash to start of Auto-Initialization from
EEPROM
26.00 μs
t2
t3
2.66 ms
Auto-Initialization from EEPROM cycle time
EEPROM serial clock period
19.26 μs
Table 14. Auto-Initialization from EEPROM Timing Symbols
Parameter Description
S
W
A
START condition
R/W 0 = Write Command, 1 = Read Command
Acknowledge
D
N
P
Serial data
No-Acknowledge
STOP condition
© 2007 Silicon Image, Inc.
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SiI-DS-0103-D