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SI3225-FQ 参数 Datasheet PDF下载

SI3225-FQ图片预览
型号: SI3225-FQ
PDF下载: 下载PDF文件 查看货源
内容描述: 双PROSLIC®可编程CMOS SLIC / CODEC [DUAL PROSLIC® PROGRAMMABLE CMOS SLIC/CODEC]
分类和应用: 电池电信集成电路
文件页数/大小: 108 页 / 1519 K
品牌: SILICONIMAGE [ Silicon image ]
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Si3220/Si3225  
VOFF VRING  
_
510 Ω  
+
806 kΩ  
806 kΩ  
Relay  
Phone  
RING  
Hook  
Protection  
Si3200  
Si3225  
Switch  
TIP  
VDD  
Figure 31. Si3225 External Ring Trip Circuitry  
Ringing Relay Activation During Zero Crossings  
The Si3225 is for applications that use a centralized  
timing sequence for a typical ringing relay control  
application.  
ringing generator and a per-channel ringing relay to During a typical ringing sequence, the Si3225 monitors  
connect the ringing signal to the TIP/RING pair. The both the ringing relay current (IRNGNG) and the  
Si3225 has one relay driver output per channel (RRDa RINGEN bit of the RINGCON register. The RINGEN bit  
and RRDb) that can drive a mechanical or solid-state toggles because of pre-programmed ringing cadence or  
DPDT relay. To reduce impulse noise that can couple  
a
change in operating state. COUNTER0 and  
into adjacent lines, the relay should be closed when COUNTER1 are restarted at each alternating zero  
there is zero voltage across the relay contacts and current crossing event, and the delay period,  
opened during periods when there is zero current ZERDELAY, equal to the ringing frequency period less  
through the contacts.  
Closing the Relay at Zero Voltage  
the desired advance firing time, D, is entered by the  
user. If either counter reaches the same value as  
ZERDELAY, the relay control signal is enabled when the  
RINGEN bit transition has already occurred. During  
typical ringing bursts, the LFS bits of the linefeed  
register toggle between the RINGING and OHT states  
based on the pre-programmed ringing cadence. The  
transition from OHT to RINGING is synchronized with  
the RRD state transitions, so the ringing burst starts  
immediately. The transition from RINGING to OHT is  
Internal voltage monitoring circuitry closes the relay at  
zero voltage with respect to the line voltage. By  
observing the phase of the ringing signal and constantly  
monitoring the open-circuit T-R voltage, V , the  
OC  
Si3225 can detect the next time when there is zero  
voltage across the relay contacts.  
Opening the Relay at Zero Current  
Opening the ringing relay at zero current also is gated by a user-programmed delay period, LFSDELAY,  
accomplished using the internal monitoring circuitry and which ensures the ringing burst has ceased before  
prevents arcing from excess current flow when the relay going to the OHT state or to the ACTIVE state in  
contacts are opened. The current flowing through the response to a linefeed state change.  
ringing relay is continuously monitored in the IRNGNG  
RAM address, and two internal counters (COUNTER0  
and COUNTER1) detect time elapsed since the last two  
zero current crossings based on the ringing period and  
predict when the next zero crossing occurs. The ringing  
relay current and internal counters are both updated at  
an 8 kHz rate. To account for the mechanical delay of  
the relay, a programmable advance firing timer allows  
the user to initiate relay opening up to 10 ms prior to the  
zero current crossing event. Figure 30 illustrates the  
Polarity Reversal  
The Dual ProSLIC devices support polarity reversal for  
message-waiting functionality and various signaling  
modes. The ramp rate can be programmed for a smooth  
transition or an abrupt transition to accommodate  
different application requirements. A wink function is  
provided for special equipment that responds to a  
smooth ramp to V = 0 V. Table 32 illustrates the  
OC  
register bits required to program the polarity reversal  
modes.  
56  
Rev. 1.0