Preliminary
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Symbol
Parameter
Condition
Min
Typ
Max
Unit
1 MSamples/s, 12 bit, differen-
tial, 2xVDD reference
75
69
75
dBc
1 MSamples/s, 12 bit, differen-
tial, 5V reference
dBc
dBc
200 kSamples/s, 12 bit, sin-
gle ended, internal 1.25V refer-
ence
200 kSamples/s, 12 bit, single
ended, internal 2.5V reference
75
76
79
79
78
79
79
dBc
dBc
dBc
dBc
dBc
dBc
dBc
200 kSamples/s, 12 bit, single
ended, VDD reference
200 kSamples/s, 12 bit, differ-
ential, internal 1.25V reference
200 kSamples/s, 12 bit, differ-
ential, internal 2.5V reference
200 kSamples/s, 12 bit, differ-
ential, 5V reference
200 kSamples/s, 12 bit, differ-
ential, VDD reference
200 kSamples/s, 12 bit, differ-
ential, 2xVDD reference
After calibration, single ended
After calibration, differential
0.3
0.3
mV
VADCOFFSET
Offset voltage
mV
-1.92
-6.3
mV/°C
Thermometer out-
put gradient
ADC
Codes/
°C
TGRADADCTH
DNLADC
INLADC
Differential non-lin-
earity (DNL)
±0.7
±1.2
LSB
Integral non-linear-
ity (INL), End point
method
LSB
MCADC
No missing codes
11.9991
12
bits
1On the average every ADC will have one missing code, most likely to appear around 2048 +/- n*512 where n can be a value in
the set {-3, -2, -1, 1, 2, 3}. There will be no missing code around 2048, and in spite of the missing code the ADC will be monotonic
at all times so that a response to a slowly increasing input will always be a slowly increasing output. Around the one code that is
missing, the neighbour codes will look wider in the DNL plot. The spectra will show spurs on the level of -78dBc for a full scale
input for chips that have the missing code issue.
The integral non-linearity (INL) and differential non-linearity parameters are explained in Figure 3.24 (p.
33) and Figure 3.25 (p. 33) , respectively.
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2013-10-09 - EFM32ZG110FXX - d0064_Rev0.60
32
SILICONIMAGE [ Silicon image ]
