Preliminary
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Symbol
Parameter
Condition
Min
Typ
Max
Unit
12 bit
13
1
ADC-
CLK
Cycles
tADCACQ
Acquisition time
Programmable
256 ADC-
CLK
Cycles
tADCACQVDD3
Required acquisi-
tion time for VDD/3
reference
2
µs
Startup time of ref-
erence generator
and ADC core in
NORMAL mode
5
1
µs
tADCSTART
Startup time of ref-
erence generator
and ADC core in
KEEPADCWARM
mode
µs
1 MSamples/s, 12 bit, single
ended, internal 1.25V refer-
ence
59
dB
1 MSamples/s, 12 bit, single
ended, internal 2.5V reference
63
65
60
65
54
67
69
62
dB
dB
dB
dB
dB
dB
dB
dB
1 MSamples/s, 12 bit, single
ended, VDD reference
1 MSamples/s, 12 bit, differen-
tial, internal 1.25V reference
1 MSamples/s, 12 bit, differen-
tial, internal 2.5V reference
1 MSamples/s, 12 bit, differen-
tial, 5V reference
1 MSamples/s, 12 bit, differen-
tial, VDD reference
1 MSamples/s, 12 bit, differen-
tial, 2xVDD reference
Signal to Noise Ra-
tio (SNR)
SNRADC
200 kSamples/s, 12 bit, sin-
gle ended, internal 1.25V refer-
ence
200 kSamples/s, 12 bit, single
ended, internal 2.5V reference
63
67
63
66
66
69
dB
dB
dB
dB
dB
dB
200 kSamples/s, 12 bit, single
ended, VDD reference
200 kSamples/s, 12 bit, differ-
ential, internal 1.25V reference
200 kSamples/s, 12 bit, differ-
ential, internal 2.5V reference
200 kSamples/s, 12 bit, differ-
ential, 5V reference
200 kSamples/s, 12 bit, differ-
ential, VDD reference
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2013-10-09 - EFM32ZG110FXX - d0064_Rev0.60
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