SiM3C1xx
Table 5.1. Pin Definitions and alternate functions for SiM3C1x7 (Continued)
Pin Name
Type
PB3.4
5 V Tolerant I/O
16 A9 XBR1
15 B7 XBR1
OE
INT0.9
INT1.9
WAKE.8
CMP0P.4
CMP1P.4
PB3.5
PB3.6
PB3.7
5 V Tolerant I/O
5 V Tolerant I/O
5 V Tolerant I/O
ALEm
DAC0T2
DAC1T2
INT0.10
INT1.10
WAKE.9
CMP0N.4
CMP1N.4
14 A8 XBR1
CS0
BE1
DAC0T3
DAC1T3
INT0.11
INT1.11
WAKE.10
CMP0P.5
CMP1P.5
13 B6 XBR1
DAC0T4
DAC1T4
LPT0T1
INT0.12
INT1.12
WAKE.11
CMP0N.5
CMP1N.5
PB3.8
PB3.9
5 V Tolerant I/O
5 V Tolerant I/O
12 A7 XBR1
CS1
BE0
DAC0T5
DAC1T5
LPT0T2
INT0.13
INT1.13
WAKE.12
CMP0P.6
CMP1P.6
EXREGSP
11 B5 XBR1
DAC0T6
DAC1T6
INT0.14
INT1.14
WAKE.13
CMP0N.6
CMP1N.6
EXREGSN
PB3.10
PB3.11
5 V Tolerant I/O
5 V Tolerant I/O
10 B4 XBR1
INT0.15
INT1.15
WAKE.14
CMP0P.7
CMP1P.7
EXREGOUT
9
B3 XBR1
WAKE.15
CMP0N.7
CMP1N.7
EXREGBD
Preliminary Rev. 0.8
55
SILICON [ SILICON ]
