Si823x
LGA-14 (5 x 5 mm)
1
14
13
12
11
10
GNDI
VIA
VDDA
VOA
2
3
4
5
GNDA
NC
VIB
VDDI
Si8233
DISABLE
VDDB
6
7
7
8
DT
VOB
VDDI
GNDB
Table 15. Si8233 Two-Input HS/LS Isolated Driver (14 LD LGA)
Pin
GNDI
VIA
Name
Description
1
2
3
4
5
Input-side ground terminal.
Non-inverting logic input terminal for Driver A.
VIB
Non-inverting logic input terminal for Driver B.
VDDI
DISABLE
Input-side power supply terminal; connect to a source of 4.5 to 5.5 V.
Device Disable. When high, this input unconditionally drives outputs VOA, VOB LOW.
It is strongly recommended that this input be connected to external logic level to avoid
erroneous operation due to capacitive noise coupling.
DT
6
Dead time programming input. The value of the resistor connected from DT to ground
sets the dead time between output transitions of VOA and VOB. Defaults to 1 ns dead
time when connected to VDDI or left open (see"5.7.Programmable Dead Time and
Overlap Protection" on page 26).
VDDI
GNDB
VOB
7
Input-side power supply terminal; connect to a source of 4.5 to 5.5 V.
Ground terminal for Driver B.
8
9
Driver B output (low-side driver).
VDDB
NC
10
11
12
13
14
Driver B power supply voltage terminal; connect to a source of 6.5 to 24 V.
No connection.
GNDA
VOA
Ground terminal for Driver A.
Driver A output (high-side driver).
VDDA
Driver A power supply voltage terminal; connect to a source of 6.5 to 24 V.
34
Rev. 0.3
SILICON [ SILICON ]
