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SI3056DC2-EVB 参数 Datasheet PDF下载

SI3056DC2-EVB图片预览
型号: SI3056DC2-EVB
PDF下载: 下载PDF文件 查看货源
内容描述: 全球串行接口直接访问安排 [GLOBAL SERIAL INTERFACE DIRECT ACCESS ARRANGEMENT]
分类和应用:
文件页数/大小: 94 页 / 1395 K
品牌: SILICON [ SILICON ]
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Si3056  
Si3018/19/10  
Register 43. Line Current/Voltage Threshold Interrupt (Si3019 Line-Side Device Only)  
Bit  
D7  
D6  
D5  
D4  
D3  
CVT[7:0]  
R/W  
D2  
D1  
D0  
Name  
Type  
Reset settings = 0000_0000  
Bit  
7:0  
Name  
CVT[7:0] Current/Voltage Threshold.  
Function  
Determines the threshold at which an interrupt is generated from either the LCS or LVS regis-  
ter. Generate this interrupt to occur when the line current or line voltage rises above or drops  
below the value in the CVT[7:0] register.  
Register 44. Line Current/Voltage Threshold Interrupt Control (Si3019 Line-Side Device Only)  
Bit  
D7  
D6  
D5  
D4  
D3  
CVI  
R/W  
D2  
D1  
D0  
Name  
Type  
CVS  
R/W  
CVM  
R/W  
CVP  
R/W  
Reset settings = 0000_0000  
Bit Name  
7:4 Reserved Read returns zero.  
Function  
3
CVI  
Current/Voltage Interrupt.  
0 = The current / voltage threshold has not been crossed.  
1 = The current / voltage threshold is crossed. If the CVM and INTE bits are set, a hardware  
interrupt occurs on the AOUT/INT pin. Once set, this bit must be written to 0 to be cleared.  
2
1
CVS  
CVM  
Current/Voltage Select.  
0 = The line current shown in the LCS2 register generates an interrupt.  
1 = The line voltage shown in the LVS register generates an interrupt.  
Current/Voltage Interrupt Mask.  
0 = The current / voltage threshold being triggered does not cause a hardware interrupt on the  
AOUT/INT pin.  
1 = The current / voltage threshold being triggered causes a hardware interrupt on the AOUT/  
INT pin.  
0
CVP  
Current/Voltage Interrupt Polarity.  
0 = The current / voltage threshold is triggered by the absolute value of the number in either  
the LCS2 or LVS register falling below the value in the CVT[7:0] register.  
1 = The current / voltage threshold is triggered by the absolute value of the number in the  
either the LCS2 or LVS register rising above the value in the CVT[7:0] Register.  
Rev. 1.05  
77  
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