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SI3056DC2-EVB 参数 Datasheet PDF下载

SI3056DC2-EVB图片预览
型号: SI3056DC2-EVB
PDF下载: 下载PDF文件 查看货源
内容描述: 全球串行接口直接访问安排 [GLOBAL SERIAL INTERFACE DIRECT ACCESS ARRANGEMENT]
分类和应用:
文件页数/大小: 94 页 / 1395 K
品牌: SILICON [ SILICON ]
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Si3056  
Si3018/19/10  
New features have been added to the Si3056  
including more ac terminations, a programmable  
hybrid, finer gain/attenuation step resolution, finer  
resolution loop current monitoring capability, ring  
validation, more HW interrupts, a 200 Hz low  
frequency filter pole. (See the appropriate functional  
descriptions.)  
5. Functional Description  
The Si3056 is an integrated direct access arrangement  
(DAA) that provides a programmable line interface to  
meet global telephone line interface requirements. The  
®
Si3056 implements Silicon Laboratories patented  
isolation technology and offers the highest level of  
integration by replacing an analog front end (AFE), an  
isolation transformer, relays, opto-isolators, and a 2- to  
4-wire hybrid with two 16-pin packages.  
The secondary communication data format (see  
"5.26.Digital Interface" on page 37).  
The low-power sleep mode, and system  
requirements to support wake-on-ring. (See  
"5.28.Power Management" on page 39.)  
The Si3056 DAA is software programmable to meet  
global requirements and is compliant with FCC, TBR21,  
JATE, and other country-specific PTT specifications as  
shown in Table 16 on page 26. In addition, the Si3056  
meets the most stringent worldwide requirements for  
out-of-band energy, emissions, immunity, high-voltage  
surges, and safety, including FCC Part 15 and 68,  
EN55022, EN55024, and many other standards.  
5.2. Line-Side Device Support  
Three different line-side devices can be used with the  
Si3056 system-side device:  
Globally-compliant line-side device—Targets global  
DAA requirements. Use the Si3018 global line-side  
device for this configuration. This line-side device  
supports both FCC-compliant countries and non-  
FCC-compliant countries.  
Globally-compliant, enhanced features line-side  
device—Targets embedded and voice applications  
with global DAA requirements. Use the Si3019 line-  
side device for this configuration. The Si3019  
contains all the features available on the Si3018,  
plus the following additional features/enhancements:  
5.1. Upgrading from the Si3034/35/44 to  
Si3056  
The Si3056 offers Silicon Laboratories customers  
®
currently using Si3034/35/44 standard serial interface  
DAA chipsets with an upgrade path for use in new  
designs. The Si3056 digital interface is similar to the  
Si3034/35/44 DAAs, thus the Si3056 retains the ability  
to connect to many widely available DSPs. This also  
allows customers to leverage software developed for  
existing Si3034/35/44 designs. More importantly, the  
Si3056 also offers a number of new features not  
provided in the Si3034/35/44 DAAs. An overview of the  
feature differences between the Si3044 and the Si3056  
is presented in Table 14. Finally, the globally-compliant  
Si3056 can be implemented with roughly half the  
external components required in the already highly  
integrated Si3034/35/44 DAA application circuits. The  
following items have changed in the Si3056 as  
compared to the Si3034/35/44 DAAs:  
Sixteen selectable ac terminations to increase return  
loss and trans-hybrid loss performance.  
Higher transmit and receive level mode.  
Selectable 200 Hz low frequency pole.  
16 to 13.5 dB digital gain/attenuation adjustment in  
0.1 dB increments for the transmit and receive paths.  
Programmable line current/voltage threshold interrupt.  
Globally-compliant, low-speed only line-side  
device—Targets embedded 2400 bps soft modem  
applications. Use the Si3010 line-side device for this  
configuration. The Si3010 contains all the features  
available on the Si3018, except the transmit and  
receive paths are optimized and tested only for  
modem connect rates up to 2400 bps.  
The pinout, the application circuit, and the bill of  
materials. The Si3056 is not pin compatible with  
Si3034/35/44 DAA chipsets.  
Rev. 1.05  
21  
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