Si1000/1/2/3/4/5
Table 23.9. EZRadioPRO Internal Register Descriptions (Continued)
Add R/W
Function/Desc
Data
D4
skip2ph
pkrx
POR
Default
D7
enpacrx
0
D6
lsbfrst
rxcrc1
D5
crcdonly
pksrch
D3
enpactx
pkvalid
D2
encrc
crcerror
D1
crc[1]
pktx
D0
crc[0]
pksent
30
31
R/W
R
Data Access Control
EzMAC status
8Dh
—
32
33
34
35
36
37
38
39
3A
3B
3C
3D
3E
3F
40
41
42
43
44
R/W
R/W
R/W
Header Control 1
Header Control 2
Preamble Length
bcen[3:0]
hdch[3:0]
0Ch
22h
08h
2Ah
2Dh
D4h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
FFh
FFh
FFh
FFh
—
skipsyn
prealen[7]
preath[4]
sync[31]
sync[23]
sync[15]
sync[7]
txhd[31]
txhd[23]
txhd[15]
txhd[7]
pklen[7]
chhd[31]
chhd[23]
chhd[15]
chhd[7]
hden[31]
hden[23]
hden[15]
hden[7]
rxhd[31]
rxhd[23]
rxhd[15]
rxhd[7]
hdlen[2]
prealen[6]
preath[3]
sync[30]
sync[22]
sync[14]
sync[6]
hdlen[1]
prealen[5]
preath[2]
sync[29]
sync[21]
sync[13]
sync[5]
hdlen[0]
prealen[4]
preath[1]
sync[28]
sync[20]
sync[12]
sync[4]
txhd[28]
txhd[20]
txhd[12]
txhd[4]
pklen[4]
chhd[28]
chhd[20]
chhd[12]
chhd[4]
hden[28]
hden[20]
hden[12]
hden[4]
rxhd[28]
rxhd[20]
rxhd[12]
rxhd[4]
fixpklen
prealen[3]
preath[0]
sync[27]
sync[19]
sync[11]
sync[3]
txhd[27]
txhd[19]
txhd[11]
txhd[3]
pklen[3]
chhd[27]
chhd[19]
chhd[11]
chhd[3]
hden[27]
hden[19]
hden[11]
hden[3]
rxhd[27]
rxhd[19]
rxhd[11]
rxhd[3]
synclen[1]
prealen[2]
rssi_off[2]
sync[26]
sync[18]
sync[10]
sync[2]
synclen[0]
prealen[1]
rssi_off[1]
sync[25]
sync[17]
sync[9]
prealen[8]
prealen[0]
rssi_off[0]
sync[24]
sync[16]
sync[8]
R/W Preamble Detection Control
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
Sync Word 3
Sync Word 2
Sync Word 1
Sync Word 0
sync[1]
sync[0]
Transmit Header 3
Transmit Header 2
Transmit Header 1
Transmit Header 0
Transmit Packet Length
Check Header 3
Check Header 2
Check Header 1
Check Header 0
Header Enable 3
Header Enable 2
Header Enable 1
Header Enable 0
Received Header 3
Received Header 2
Received Header 1
Received Header 0
Received Packet Length
txhd[30]
txhd[22]
txhd[14]
txhd[6]
pklen[6]
chhd[30]
chhd[22]
chhd[14]
chhd[6]
hden[30]
hden[22]
hden[14]
hden[6]
rxhd[30]
rxhd[22]
rxhd[14]
rxhd[6]
txhd[29]
txhd[21]
txhd[13]
txhd[5]
pklen[5]
chhd[29]
chhd[21]
chhd[13]
chhd[5]
hden[29]
hden[21]
hden[13]
hden[5]
rxhd[29]
rxhd[21]
rxhd[13]
rxhd[5]
txhd[26]
txhd[18]
txhd[10]
txhd[2]
txhd[25]
txhd[17]
txhd[9]
txhd[24]
txhd[16]
txhd[8]
txhd[1]
txhd[0]
pklen[2]
chhd[26]
chhd[18]
chhd[10]
chhd[2]
hden[26]
hden[18]
hden[10]
hden[2]
rxhd[26]
rxhd[18]
rxhd[10]
rxhd[2]
pklen[1]
chhd[25]
chhd[17]
chhd[9]
chhd[1]
hden[25]
hden[17]
hden[9]
hden[1]
rxhd[25]
rxhd[17]
rxhd[9]
pklen[0]
chhd[24]
chhd[16]
chhd[8]
chhd[0]
hden[24]
hden[16]
hden[8]
hden[0]
rxhd[24]
rxhd[16]
rxhd[8]
45
46
47
48
R
R
R
R
—
—
—
—
49
4A
4B
4C-4E
4F
50-5F
60
rxhd[1]
rxhd[0]
rxplen[0]
rxplen[7]
rxplen[6]
rxplen[5]
rxplen[4]
rxplen[3]
rxplen[2]
rxplen[1]
Reserved
adc8[5]
Reserved
R/W
R/W
ADC8 Control
Reserved
Reserved
adc8[4]
adc8[3]
adc8[2]
adc8[1]
adc8[0]
10h
00h
Channel Filter Coefficient
Address
Inv_pre_th[3]
Inv_pre_th[2] Inv_pre_th[1] Inv_pre_th[0] chfiladd[3]
chfiladd[2]
chfiladd[1]
chfiladd[0]
61
62
Reserved
R/W
Crystal Oscillator/
Control Test
pwst[2]
pwst[1]
pwst[0]
Reserved
clkhyst
enbias2x
enamp2x
bufovr
enbuf
24h
63-6C
6D
6E
6F
70
71
72
73
74
75
R/W
R/W
R/W
TX Power
TX Data Rate 1
TX Data Rate 0
Reserved
txdr[15]
txdr[7]
Reserved
trclk[1]
fd[7]
fo[7]
Reserved
Reserved
fc[15]
Reserved
txdr[14]
txdr[6]
Reserved
trclk[0]
fd[6]
fo[6]
Reserved
sbsel
Reserved
txdr[13]
txdr[5]
Reserved
txdr[12]
txdr[4]
Ina_sw
txdr[11]
txdr[3]
manppol
eninv
fd[3]
fo[3]
Reserved
fb[3]
fc[11]
txpow[2]
txdr[10]
txdr[2]
enmaninv
fd[8]
fd[2]
fo[2]
Reserved
fb[2]
fc[10]
txpow[1]
txdr[9]
txdr[1]
enmanch
modtyp[1]
fd[1]
fo[1]
fo[9]
fb[1]
fc[9]
txpow[0]
txdr[8]
txdr[0]
enwhite
modtyp[0]
fd[0]
fo[0]
fo[8]
fb[0]
fc[8]
18h
0Ah
3Dh
0Ch
00h
20h
00h
00h
75h
BBh
R/W Modulation Mode Control 1
R/W Modulation Mode Control 2
R/W
R/W
R/W
R/W
txdtrtscale
dtmod[1]
fd[5]
enphpwdn
dtmod[0]
fd[4]
Frequency Deviation
Frequency Offset 1
Frequency Offset 2
Frequency Band Select
fo[5]
fo[4]
Reserved
hbsel
Reserved
fb[4]
76
R/W Nominal Carrier Frequency
fc[14]
fc[13]
fc[12]
1
77
R/W Nominal Carrier Frequency
0
fc[7]
fc[6]
fc[5]
fc[4]
fc[3]
fc[2]
fc[1]
fc[0]
80h
78
79
Reserved
fhch[5]
R/W Frequency Hopping Chan-
nel Select
fhch[7]
fhs[7]
fhch[6]
fhs[6]
fhch[4]
fhs[4]
fhch[3]
fhs[3]
fhch[2]
fhs[2]
fhch[1]
fhs[1]
fhch[0]
fhs[0]
00h
00h
7A
R/W
Frequency Hopping Step
Size
fhs[5]
7B
7C
7D
7E
7F
Reserved
R/W
R/W
R/W
R/W
TX FIFO Control 1
TX FIFO Control 2
RX FIFO Control
FIFO Access
Reserved
Reserved
Reserved
fifod[7]
Reserved
Reserved
Reserved
fifod[6]
txafthr[5]
txaethr[5]
rxafthr[5]
fifod[5]
txafthr[4]
txaethr[4]
rxafthr[4]
fifod[4]
txafthr[3]
txaethr[3]
rxafthr[3]
fifod[3]
txafthr[2]
txaethr[2]
rxafthr[2]
fifod[2]
txafthr[1]
txaethr[1]
rxafthr[1]
fifod[1]
txafthr[0]
txaethr[0]
rxafthr[0]
fifod[0]
37h
04h
37h
—
Note: Detailed register descriptions are available in “AN440: EZRadioPRO Detailed Register Descriptions.
Rev. 1.0
285
SILICON [ SILICON ]
