Si1000/1/2/3/4/5
XTAL Settling
Time
RX Packet
600us
Figure 23.3. RX Timing
23.3.1. Frequency Control
For calculating the necessary frequency register settings it is recommended that customers use Silicon
Labs’ Wireless Design Suite (WDS) or the EZRadioPRO Register Calculator worksheet (in Microsoft
Excel) available on the product website. These methods offer a simple method to quickly determine the
correct settings based on the application requirements. The following information can be used to calcu-
lated these values manually.
23.3.2. Frequency Programming
In order to receive or transmit an RF signal, the desired channel frequency, f
, must be programmed
carrier
into the transceiver. Note that this frequency is the center frequency of the desired channel and not an LO
frequency. The carrier frequency is generated by a Fractional-N Synthesizer, using 10 MHz both as the ref-
rd
erence frequency and the clock of the (3 order) ΔΣ modulator. This modulator uses modulo 64000 accu-
mulators. This design was made to obtain the desired frequency resolution of the synthesizer. The overall
division ratio of the feedback loop consist of an integer part (N) and a fractional part (F).In a generic sense,
the output frequency of the synthesizer is as follows:
fOUT 10MHz(N F)
The fractional part (F) is determined by three different values, Carrier Frequency (fc[15:0]), Frequency Off-
set (fo[8:0]), and Frequency Deviation (fd[7:0]). Due to the fine resolution and high loop bandwidth of the
synthesizer, FSK modulation is applied inside the loop and is done by varying F according to the incoming
data; this is discussed further in “Frequency Deviation” on page 248. Also, a fixed offset can be added to
fine-tune the carrier frequency and counteract crystal tolerance errors. For simplicity assume that only the
fc[15:0] register will determine the fractional component. The equation for selection of the carrier frequency
is shown below:
Rev. 1.0
245
SILICON [ SILICON ]
