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C8051F502-IM 参数 Datasheet PDF下载

C8051F502-IM图片预览
型号: C8051F502-IM
PDF下载: 下载PDF文件 查看货源
内容描述: 混合信号ISP功能的Flash MCU系列 [Mixed Signal ISP Flash MCU Family]
分类和应用: 微控制器和处理器外围集成电路PC时钟
文件页数/大小: 312 页 / 2813 K
品牌: SILICON [ SILICON ]
 浏览型号C8051F502-IM的Datasheet PDF文件第90页浏览型号C8051F502-IM的Datasheet PDF文件第91页浏览型号C8051F502-IM的Datasheet PDF文件第92页浏览型号C8051F502-IM的Datasheet PDF文件第93页浏览型号C8051F502-IM的Datasheet PDF文件第95页浏览型号C8051F502-IM的Datasheet PDF文件第96页浏览型号C8051F502-IM的Datasheet PDF文件第97页浏览型号C8051F502-IM的Datasheet PDF文件第98页  
C8051F50x-F51x  
SFR Definition 11.3. SP: Stack Pointer  
Bit  
7
6
5
4
3
2
1
0
SP[7:0]  
R/W  
Name  
Type  
Reset  
0
0
0
0
0
1
1
1
SFR Address = 0x81; SFR Page = All Pages  
Bit  
Name  
Function  
7:0  
SP[7:0]  
Stack Pointer.  
The Stack Pointer holds the location of the top of the stack. The stack pointer is incre-  
mented before every PUSH operation. The SP register defaults to 0x07 after reset.  
SFR Definition 11.4. ACC: Accumulator  
Bit  
7
6
5
4
3
2
1
0
ACC[7:0]  
R/W  
Name  
Type  
Reset  
0
0
0
0
0
0
0
0
SFR Address = 0xE0; SFR Page = All Pages; Bit-Addressable  
Bit  
Name  
Function  
7:0  
ACC[7:0] Accumulator.  
This register is the accumulator for arithmetic operations.  
SFR Definition 11.5. B: B Register  
Bit  
7
6
5
4
3
2
1
0
B[7:0]  
R/W  
Name  
Type  
Reset  
0
0
0
0
0
0
0
0
SFR Address = 0xF0; SFR Page = All Pages; Bit-Addressable  
Bit  
Name  
Function  
7:0  
B[7:0]  
B Register.  
This register serves as a second accumulator for certain arithmetic operations.  
94  
Rev. 1.1  
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