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C8051F502-IM 参数 Datasheet PDF下载

C8051F502-IM图片预览
型号: C8051F502-IM
PDF下载: 下载PDF文件 查看货源
内容描述: 混合信号ISP功能的Flash MCU系列 [Mixed Signal ISP Flash MCU Family]
分类和应用: 微控制器和处理器外围集成电路PC时钟
文件页数/大小: 312 页 / 2813 K
品牌: SILICON [ SILICON ]
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C8051F50x-F51x  
21. Local Interconnect Network (LIN)  
Important Note: This chapter assumes an understanding of the Local Interconnect Network (LIN) proto-  
col. For more information about the LIN protocol, including specifications, please refer to the LIN consor-  
tium (http://www.lin-subbus.org).  
LIN is an asynchronous, serial communications interface used primarily in automotive networks. The Sili-  
con Laboratories LIN controller is compliant to the 2.1 Specification, implements a complete hardware LIN  
interface and includes the following features:  
Selectable Master and Slave modes.  
Automatic baud rate option in slave mode.  
The internal oscillator is accurate to within 0.5% of 24 MHz across the entire supply voltage and  
temperature range and so an external oscillator is not necessary for master mode operation.  
Note: The minimum system clock (SYSCLK) required when using the LIN controller is 8 MHz.  
C8051F500/2/4/6  
LIN Controller  
8051 MCU Core  
LIN0ADR  
LIN Data  
Registers  
LIN Control  
Registers  
LIN0DAT  
LIN0CF  
Indirectly Addressed Registers  
TX  
RX  
Control State Machine  
Figure 21.1. LIN Block Diagram  
The LIN controller has four main components:  
LIN Access Registers—Provide the interface between the MCU core and the LIN controller.  
LIN Data Registers—Where transmitted and received message data bytes are stored.  
LIN Control Registers—Control the functionality of the LIN interface.  
Control State Machine and Bit Streaming Logic—Contains the hardware that serializes messages and  
controls the bus timing of the controller.  
Rev. 1.1  
201