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C8051F502-IM 参数 Datasheet PDF下载

C8051F502-IM图片预览
型号: C8051F502-IM
PDF下载: 下载PDF文件 查看货源
内容描述: 混合信号ISP功能的Flash MCU系列 [Mixed Signal ISP Flash MCU Family]
分类和应用: 微控制器和处理器外围集成电路PC时钟
文件页数/大小: 312 页 / 2813 K
品牌: SILICON [ SILICON ]
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C8051F50x-F51x  
SFR Page 0x0  
Automatically  
pushed on stack in  
SFRPAGE on PCA  
interrupt  
0x0  
SFRPAGE  
SFRNEXT  
SFRLAST  
(PCA)  
0xC  
SFRPAGE  
pushed to  
SFRNEXT  
(CAN0)  
0x0  
SFRNEXT  
pushed to  
SFRLAST  
(SPI0DAT)  
Figure 13.4. SFR Page Stack Upon PCA Interrupt Occurring During a CAN0 ISR  
On exit from the PCA interrupt service routine, the CIP-51 will return to the CAN0 ISR. On execution of the  
RETI instruction, SFR Page 0x00 used to access the PCA registers will be automatically popped off of the  
SFR Page Stack, and the contents of the SFRNEXT register will be moved to the SFRPAGE register. Soft-  
ware in the CAN0 ISR can continue to access SFRs as it did prior to the PCA interrupt. Likewise, the con-  
tents of SFRLAST are moved to the SFRNEXT register. Recall this was the SFR Page value 0x00 being  
used to access SPI0DAT before the CAN0 interrupt occurred. See Figure 13.5.  
104  
Rev. 1.1  
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