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C8051F339 参数 Datasheet PDF下载

C8051F339图片预览
型号: C8051F339
PDF下载: 下载PDF文件 查看货源
内容描述: 混合信号ISP功能的Flash MCU系列 [Mixed Signal ISP Flash MCU Family]
分类和应用:
文件页数/大小: 234 页 / 3348 K
品牌: SILICON [ SILICON ]
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C8051F336/7/8/9  
7.4. ADC0 Analog Multiplexer (C8051F336/8 only)  
ADC0 on the C8051F336/8 has two analog multiplexers, referred to collectively as AMUX0.  
AMUX0 selects the positive and negative inputs to the ADC. Any of the following may be selected as the  
positive input: Port I/O pins, the on-chip temperature sensor, or the positive power supply (V ). Any of the  
DD  
following may be selected as the negative input: Port I/O pins, V , or GND. When GND is selected as  
REF  
the negative input, ADC0 operates in Single-ended Mode; all other times, ADC0 operates in Differ-  
ential Mode. The ADC0 input channels are selected in the AMX0P and AMX0N registers as described in  
SFR Definition 7.9 and SFR Definition 7.10.  
P0.0  
AMX0P  
AMUX  
P2.3*  
Temp  
Sensor  
AIN+  
AIN-  
VDD  
P0.0  
ADC0  
AMUX  
AMX0N  
P2.3*  
VREF  
GND  
*P2.0-P2.3 Only available as  
inputs on QFN24 Packaging  
Figure 7.8. ADC0 Multiplexer Block Diagram  
Important Note About ADC0 Input Configuration: Port pins selected as ADC0 inputs should be config-  
ured as analog inputs, and should be skipped by the Digital Crossbar. To configure a Port pin for analog  
input, set to ‘0’ the corresponding bit in register PnMDIN. To force the Crossbar to skip a Port pin, set to ‘1’  
the corresponding bit in register PnSKIP. See Section “20. Port Input/Output” on page 126 for more Port  
I/O configuration details.  
Rev. 0.2  
55