C8051F360/1/2/3/4/5/6/7/8/9
5.4. Programmable Window Detector
The ADC Programmable Window Detector continuously compares the ADC0 output registers to user-pro-
grammed limits, and notifies the system when a desired condition is detected. This is especially effective in
an interrupt-driven system, saving code space and CPU bandwidth while delivering faster system
response times. The window detector interrupt flag (AD0WINT in register ADC0CN) can also be used in
polled mode. The ADC0 Greater-Than (ADC0GTH, ADC0GTL) and Less-Than (ADC0LTH, ADC0LTL) reg-
isters hold the comparison values. The window detector flag can be programmed to indicate when mea-
sured data is inside or outside of the user-programmed limits, depending on the contents of the ADC0
Less-Than and ADC0 Greater-Than registers.
SFR Definition 5.7. ADC0GTH: ADC0 Greater-Than Data High Byte
SFR Page:
all pages
SFR Address: 0xC4
R/W
R/W
R/W
Bit5
R/W
Bit4
R/W
Bit3
R/W
Bit2
R/W
Bit1
R/W
Bit0
Reset Value
11111111
Bit7
Bit6
Bits 7–0: High byte of ADC0 Greater-Than Data Word.
SFR Definition 5.8. ADC0GTL: ADC0 Greater-Than Data Low Byte
SFR Page:
all pages
SFR Address: 0xC3
R/W
R/W
R/W
Bit5
R/W
Bit4
R/W
Bit3
R/W
Bit2
R/W
Bit1
R/W
Bit0
Reset Value
11111111
Bit7
Bit6
Bits 7–0: Low byte of ADC0 Greater-Than Data Word.
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Rev. 1.0