C8051F360/1/2/3/4/5/6/7/8/9
CP0EN
CP0OUT
CP0RIF
VDD
CMX0N3
CMX0N2
CMX0N1
CMX0N0
CP0FIF
CP0HYP1
CP0HYP0
CP0HYN1
CP0HYN0
CMX0P1
CMX0P0
P1.4 / P1.0
P2.3 / P1.4
P3.1 / P2.0
P3.5 / P2.4
CP0 +
CP0
+
SET
CLR
SET
CLR
D
Q
Q
D
Q
Q
-
Crossbar
(SYNCHRONIZER)
GND
CP0A
Reset
Decision
Tree
P1.5 / P1.1
P2.4 / P1.5
P3.2 / P2.1
P3.6 / P2.5
0
1
CP0
Interrupt
CP0EN
EA
CP0 -
CP0RIF
CP0FIF
0
0
1
1
0
1
CP0RIE
CP0FIE
CP0MD1
CP0MD0
Figure 1.12. Comparator0 Block Diagram
Rev. 1.0
29