C8051F360/1/2/3/4/5/6/7/8/9
Table 15.1. EMIF Pinout (C8051F360/3)
Multiplexed Mode
Signal Name
Non Multiplexed Mode
Signal Name
Port Pin
P4.4
P4.5
P0.0
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
P3.4
P3.5
P3.6
P3.7
P4.0
P4.1
P4.2
P4.3
–
Port Pin
P4.4
P4.5
P0.0
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
P2.0
P2.1
P2.2
P2.3
P2.4
P2.5
P2.6
P2.7
P3.4
P3.5
P3.6
P3.7
P4.0
P4.1
P4.2
P4.3
/RD
/WR
ALE
D0/A0
D1/A1
D2/A2
D3/A3
D4/A4
D5/A5
D6/A6
D7/A7
A8
/RD
/WR
ALE
D0
D1
D2
D3
D4
D5
D6
D7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A9
A10
A11
A12
A13
A14
A15
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
SFR Definition 15.1. EMI0CN: External Memory Interface Control
SFR Page:
all pages
SFR Address: 0xAA
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset Value
PGSEL7 PGSEL6 PGSEL5 PGSEL4 PGSEL3 PGSEL2 PGSEL1 PGSEL0 00000000
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Bits 7–0: PGSEL[7:0]: XRAM Page Select Bits.
The XRAM Page Select Bits provide the high byte of the 16-bit external data memory
address when using an 8-bit MOVX command, effectively selecting a 256-byte page of
RAM.
0x00: 0x0000 to 0x00FF
0x01: 0x0100 to 0x01FF
...
0xFE: 0xFE00 to 0xFEFF
0xFF: 0xFF00 to 0xFFFF
Rev. 1.0
155
SILICON [ SILICON ]
