Rev.1.2
LOW DROPOUT CMOS VOLTAGE REGULATOR
S-818 Series
VIN
Operation
*1
Current
source
1. Basic operation
Figure 7 shows the block diagram of the S-818
Series.
Error amplifier
VOUT
The error amplifier compares a reference voltage
Vref
Rf
VREF with the part of the output voltage divided by the
feedback resistors Rs and Rf. It supplies the output
transistor with the gate voltage, necessary to ensure
certain output voltage free of any fluctuations of input
voltage and temperature.
Reference
voltage
circuit
Rs
VSS
*1 Parasitic diode
Figure 7 Typical Circuit Block Diagram
2. Output transistor
The S-818 Series uses a low on-resistance Pch MOS FET as the output transistor.
Be sure that VOUT does not exceed VIN+0.3 V to prevent the voltage regulator from being broken due to
inverse current flowing from VOUT pin to VIN pin through the parasitic diode.
3. Power Off Pin (ON/OFF Pin)
This pin activates and inactivates the regulator.
When the ON/OFF pin is switched to the power off level, the operation of all internal circuit stops, the built-in
Pch MOSFET output transistor between VIN and VOUT pin is switched off, suppressing current consumption.
The VOUT pin goes to the Vss level due to internal divided resistance of several MΩ between VOUT pin and
VSS pin.
The structure of the ON/OFF pin is shown in Figure 8. Since the ON/OFF pin is neither pulled down nor pulled
up internally, do not keep it in the floating state. Current consumption increases if a voltage of 0.3 V to VIN-0.3
V is applied to the ON/OFF pin. When the power off pin is not used, connect it to the VIN pin for product type
"A" and to the VSS pin for product type "B".
Table 6 Power off pin function by product type
VIN
Product
type
ON/OFF pin
Internal
circuit
VOUT pin
voltage
Current
consumption
ON/OFF
A
A
B
B
“H” : Power on
“L” : Power off
“H” : Power off
“L” : Power on
Operating
Stop
Stop
Operating
Set value
VSS level
VSS level
Set value
Iss1
Iss2
Iss2
Iss1
Figure 8 ON/OFF Pin
VSS
Seiko Instruments Inc.
7
SII [ SEIKO INSTRUMENTS INC ]
