SUPER-SMALL PACKAGE CMOS VOLTAGE REGULATOR
S-817 Series
Rev.3.0_00
Selection of Output Capacitor (CL)
To stabilize operation against variation in output load, a capacitor (CL) must be mounted between VOUT
and VSS in the S-817 series because the phase is compensated with the help of the internal phase
compensation circuit and the ESR of the output capacitor.
When selecting a ceramic or an OS capacitor, capacitance should be 0.1 µF or more, and when selecting a
tantalum or an aluminum electrolytic capacitor, capacitance should be 0.1 µF or more and ESR 30 Ω or
less.
When an aluminum electrolytic capacitor is used attention should be especially paid to since the ESR of the
aluminum electrolytic capacitor increases at low temperature and possibility of oscillation becomes large.
Sufficient evaluation including temperature characteristics is indispensable. Overshoot and undershoot
characteristics differ depending upon the type of the output capacitor. Refer to CL dependencies in “
Reference Data 1. Transient Response Characteristics”.
Application Circuits
1. Output Current Boosting Circuit
Tr1
VOUT
VOUT
R2
S-817
series
VIN
VIN
R1
CIN
VSS
CL
GND
Figure 14
As shown in Figure 14, the output current can be boosted by externally attaching a PNP transistor. The
base current of the PNP transistor is controlled so that output voltage (VOUT) goes the voltage specified
in the S-817 Series when base-emitter voltage (VBE) necessary to turn on the PNP transistor is obtained
between input voltage (VIN) and S-817 Series power source pin (VIN).
The following are tips and hints for selecting and ensuring optimum use of external parts
• PNP transistor (Tr1):
1. Set hFE to approx. 100 to 400.
2. Confirm that no problem occurs due to power dissipation under normal operation conditions.
• Resistor (R1):
Generally set R1 to 1 kΩ ÷ VOUT (S) (the voltage specified in the S-817 Series) or more.
• Output capacitor (CL):
Output capacitor (CL) is effective in minimizing output fluctuation at powering on or due to power
or load fluctuation, but oscillation might occur. Always connect resistor R2 in series to output
capacitor CL.
• Resistor (R2): Set R2 to 2 Ω × VOUT(S) or more.
• DO NOT attach a capacitor between the S-817 Series power source (VIN) and GND pins or
between base and emitter of the PNP transistor to avoid oscillation.
• To improve transient response characteristics of the output current boosting circuit shown in
Figure 14, check that no problem occurs due to output fluctuation at powering on or due to
power or load fluctuation under normal operating conditions.
• Pay attention to the short current limit circuit incorporated into the S-817 Series because it does
not function as a shortcircuiting protection circuit for this boosting circuit.
15
Seiko Instruments Inc.
SII [ SEIKO INSTRUMENTS INC ]
