SUPER-SMALL PACKAGE CMOS VOLTAGE REGULATOR
S-817 Series
Rev.3.0_00
Measurement Circuits
1.
+
VIN
VOUT
VSS
A
+
V
Figure 8
2.
3.
A
VIN
VOUT
VSS
Figure 9
VOUT
VSS
+
VIN
A
+
V
Figure 10
Standard Circuit
INPUT
OUTPUT
VIN
VOUT
*1
*2
CIN
CL
VSS
GND
Single GND
*1. CIN is a capacitor used to stabilize input.
*2. A ceramic capacitor of 0.1 µF or more can be used for CL.
Figure 11
Caution The above connection diagram and constant will not guarantee successful operation.
Perform through evaluation using the actual application to set the constant.
11
Seiko Instruments Inc.