3-WIRE REAL-TIME CLOCK
S-35190A
Rev.2.4_00
Adjustment of Oscillation Frequency
1. Configuration of oscillation
Since crystal oscillation is sensitive to external noise (the clock accuracy is affected), the following measures are
essential for optimizing the oscillation configuration.
(1) Place the S-35190A, crystal oscillator, and external capacitor (Cg) as close to each other as possible.
(2) Increase the insulation resistance between pins and the substrate wiring patterns of XIN and XOUT.
(3) Do not place any signal or power lines close to the oscillator.
(4) Locating the GND layer immediately below the oscillator is recommended.
(5) Locate the bypass capacitor adjacent to the power supply pin of the S-35190A.
Parasitic capacitance*3
XIN
R
R
f
Oscillation internal constant
standard values:
C
g
Crystal oscillator: 32.768 kHz
R
R
C
f
=
=
=
100 MΩ
100 kΩ
8 pF
d
= 6 pF*1
= None*2 to 9.1 pF
Parasitic capacitance*3
XOUT
CL
d
d
Cg
Cd
S-35190A
*1. When setting the value for the crystal oscillator’s CL as 7 pF, connect Cd externally if necessary.
*2. Design the board so that the parasitic capacitance is 5 pF.
*3. The oscillator operates unless Cg is not connected. Note that the oscillation frequency is in the direction that it
advances.
Figure 44 Connection Diagram 1
S-35190A
1
2
3
4
8
7
6
5
XOUT
XIN
VSS
Crystal
oscillator
Cg
Locate the GND layer in the
layer immediately below
Figure 45 Connection Diagram 2
Caution 1. When using the crystal oscillator with a CL exceeding the rated value (7 pF) (e.g : CL = 12.5 pF),
oscillation operation may become unstable. Use a crystal oscillator with a CL value of 6 pF or 7 pF.
2. Oscillation characteristics are subject to the variation of each component such as substrate parasitic
capacitance, parasitic resistance, crystal oscillator, and Cg. When configuring oscillator, pay
sufficient attention for them.
36
Seiko Instruments Inc.