2-WIRE CMOS SERIAL E2PROM
S-24CS01A/02A/04A/08A
Rev.4.4_00
3. Data Transmission
Changing the SDA line while the SCL line is low, data is transmitted.
Changing the SDA line while the SCL line is high, a start or stop condition is recognized.
tSU.DAT
tHD.DAT
SCL
SDA
Figure 10 Data Transmission Timing
4. Acknowledge
The unit of data transmission is 8 bits. During the 9th clock cycle period the receiver on the bus pulls down
the SDA line to acknowledge the receipt of the 8-bit data.
When an internal write cycle is in progress, the device does not generate an acknowledge.
SCL
(E2PROM Input)
1
8
9
SDA
(Master Output)
Acknowledge
Output
SDA
(E2PROM Output)
Start Condition
tAA
tDH
Figure 11 Acknowledge Output Timing
11
Seiko Instruments Inc.
SII [ SEIKO INSTRUMENTS INC ]
