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S-1004NB50I-I6T1U 参数 Datasheet PDF下载

S-1004NB50I-I6T1U图片预览
型号: S-1004NB50I-I6T1U
PDF下载: 下载PDF文件 查看货源
内容描述: [Release delay time accuracy]
分类和应用:
文件页数/大小: 42 页 / 4284 K
品牌: SII [ SEIKO INSTRUMENTS INC ]
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BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) VOLTAGE DETECTOR WITH SENSE PIN  
Rev.2.1_01  
S-1004 Series  
3. Hysteresis width (VHYS  
)
The hysteresis width is the voltage difference between the detection voltage and the release voltage (the voltage at  
point B the voltage at point A = VHYS in "Figure 23 Timing Chart of S-1004 Series NA / NB Type" and "Figure  
25 Timing Chart of S-1004 Series CA / CB Type"). Setting the hysteresis width between the detection voltage  
and the release voltage, prevents malfunction caused by noise on the input voltage.  
4. Release delay time (tRESET  
)
The release delay time is the time period from when the input voltage to the SENSE pin exceeds the release  
voltage (+VDET) to when the output from the OUT pin inverts. The release delay time changes according to the  
delay capacitor (CD).  
VSENSE  
+VDET  
OUT  
tRESET  
Figure 20 Release Delay Time  
5. Feed-through current  
The feed-through current is a current that flows instantaneously to the VDD pin at the time of detection and release  
of a voltage detector. The feed-through current is large in CMOS output product, small in Nch open-drain output  
product.  
6. Oscillation  
In applications where an input resistor is connected (Figure 21), taking a CMOS output (active "L") product for  
example, the feed-through current which is generated when the output goes from "L" to "H" (at the time of release)  
causes a voltage drop equal to [feed-through current] × [input resistance]. Since the VDD pin and the SENSE pin  
are shorted as in Figure 21, the SENSE pin voltage drops at the time of release. Then the SENSE pin voltage  
drops below the detection voltage and the output goes from "H" to "L". In this status, the feed-through current stops  
and its resultant voltage drop disappears, and the output goes from "L" to "H". The feed-through current is then  
generated again, a voltage drop appears, and repeating the process finally induces oscillation.  
VDD  
RA  
VIN  
VDD  
OUT  
SENSE  
VSS  
CD  
RB  
(CMOS output product)  
GND  
Figure 21 Example for Bad Implementation Due to Detection Voltage Change  
15  
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