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S-1002NA50I-M5T1U 参数 Datasheet PDF下载

S-1002NA50I-M5T1U图片预览
型号: S-1002NA50I-M5T1U
PDF下载: 下载PDF文件 查看货源
内容描述: [VOLTAGE DETECTOR WITH SENSE PIN]
分类和应用:
文件页数/大小: 39 页 / 3760 K
品牌: SII [ SEIKO INSTRUMENTS INC ]
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VOLTAGE DETECTOR WITH SENSE PIN  
S-1002 Series  
Rev.1.1_02  
Explanation of Terms  
1. Detection voltage (VDET  
)
The detection voltage is a voltage at which the output in Figure 18 or Figure 19 turns to "L". The detection voltage  
varies slightly among products of the same specification. The variation of detection voltage between the specified  
minimum (VDET min.) and the maximum (VDET max.) is called the detection voltage range (Refer to Figure 16).  
Example: In the S-1002Cx18, the detection voltage is either one in the range of 1.778 V ≤ −VDET 1.822 V.  
This means that some S-1002Cx18 have VDET = 1.778 V and some have VDET = 1.822 V.  
2. Release voltage (+VDET  
)
The release voltage is a voltage at which the output in Figure 18 or Figure 19 turns to "H". The release voltage  
varies slightly among products of the same specification. The variation of release voltage between the specified  
minimum (+VDET min.) and the maximum (+VDET max.) is called the release voltage range (Refer to Figure 17). The  
range is calculated from the actual detection voltage (VDET) of a product and is in the range of VDET × 1.03 ≤  
+VDET ≤ −VDET × 1.07.  
Example: For the S-1002Cx18, the release voltage is either one in the range of 1.832 V ≤ +VDET 1.949 V.  
This means that some S-1002Cx18 have +VDET = 1.832 V and some have +VDET = 1.949 V.  
VSENSE  
Detection voltage  
Release voltage  
+VDET max.  
VDET max.  
VDET min.  
Release voltage  
range  
Detection voltage  
range  
+VDET min.  
VSENSE  
VOUT  
VOUT  
tRESET  
tDET  
Figure 16 Detection Voltage  
Figure 17 Release Voltage  
R
VDD  
VDD  
100 kΩ  
VDD  
VDD  
OUT  
OUT  
SENSE  
VSS  
SENSE  
VSS  
+
+
+
+
V
V
V
V
Figure 18 Test Circuit of Detection Voltage  
and Release Voltage  
Figure 19 Test Circuit of Detection Voltage  
and Release Voltage  
(Nch open-drain output product)  
(CMOS output product)  
14  
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