SAB 82525
SAB 82526
SAF 82525
SAF 82526
7.2 Initialization
After reset the CPU has to write a minimum set of registers and an optionally set dependent
on the required features and operating modes.
First, the configuration of the serial port and the clock mode has to be defined via the CCR1
register. The clock mode must be set before power-up, or in the same step with power-up.
The CPU may switch the HSCX between power-up and power-down mode, which has no
influence upon the contents of the registers, i.e. the internal state remains stored.
In power-down mode however, all internal clocks and the oscillator circuitry are disabled, no
interrupts are forwarded to the CPU.
This state can be used as standby mode, when the HSCX is temporarily not used, thus
lessening the power consumption to a high degree.
The individual operating mode must be defined writing the MODE register.
The need for programming further registers depends on the selected features (clock mode,
operating mode, address mode, user demands) according to the following tables:
Clock Mode
Register
0, 1
–
2, 3, 4, 6, 7
5
BGR, CCR2
CCR2, TSAR, TSAX, XCCR, RCCR
Table 8
Register Setup
Address
Mode
2 Byte
Address Field
1 Byte
Address Field
Operating
Mode
(MODE: ADM = 1)
(MODE: ADM = 0)
TIMR
XAD1
XAD2
RAH1
RAH2
RAL1
RAL2
RAH1 set to 00
H
RAH2
RAL1
RAL2
Auto
RAH1
RAH2
RAL1
RAL2
RAH1 set to 00
RAH2 set to 00
RAL1
H
H
Non Auto
RAH1
RAH2
–
Transparent
Semiconductor Group
70
SIEMENS [ Siemens Semiconductor Group ]
